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20 changes: 20 additions & 0 deletions boards/arm/stm32h750b_dk/Kconfig.defconfig
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This looks like a stray file (unless this is for HWMv1 compatibility?).
AFAIK, Kconfig should come from boards/st/stm32h750b_dk/Kconfig.stm32h750b_dk instead (which also contains this), so this file should probably be removed.

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Good catch this file is not required indeed. Please remove.

Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
# STM32H750B DK board configuration

# Copyright (c) 2023 STMicroelectronics
# SPDX-License-Identifier: Apache-2.0

if BOARD_STM32H750B_DK

config BOARD
default "stm32h750b_dk"

if DISPLAY

# MEMC needs to be enabled in order to store
# display buffer to external SDRAM connected to FMC
config MEMC
default y

endif # DISPLAY

endif # BOARD_STM32H750B_DK
9 changes: 9 additions & 0 deletions boards/st/stm32h750b_dk/Kconfig.stm32h750b_dk
Original file line number Diff line number Diff line change
Expand Up @@ -3,3 +3,12 @@

config BOARD_STM32H750B_DK
select SOC_STM32H750XX

if DISPLAY

# MEMC needs to be enabled in order to store
# display buffer to external SDRAM connected to FMC
config MEMC
default y

endif # DISPLAY
Comment on lines +7 to +14
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Already included in boards/arm/stm32h750b_dk/Kconfig.defconfig doesn't look required here.

2 changes: 2 additions & 0 deletions boards/st/stm32h750b_dk/board.cmake
Original file line number Diff line number Diff line change
@@ -1,7 +1,9 @@
# SPDX-License-Identifier: Apache-2.0

board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(jlink "--device=STM32H735IG" "--speed=4000")
board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)

include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
62 changes: 56 additions & 6 deletions boards/st/stm32h750b_dk/stm32h750b_dk.dts
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,flash-controller = &mt25ql512ab1;
zephyr,display = &ltdc;
};

sdram2: sdram@d0000000 {
Expand Down Expand Up @@ -68,6 +69,45 @@
status = "okay";
};

&ltdc {
pinctrl-0 = <&ltdc_r0_pi15 &ltdc_r1_pj0 &ltdc_r2_pj1 &ltdc_r3_ph9
&ltdc_r4_pj3 &ltdc_r5_pj4 &ltdc_r6_pj5 &ltdc_r7_pj6
&ltdc_g0_pj7 &ltdc_g1_pj8 &ltdc_g2_pj9 &ltdc_g3_pj10
&ltdc_g4_pj11 &ltdc_g5_pi0 &ltdc_g6_pi1 &ltdc_g7_pk2
&ltdc_b0_pj12 &ltdc_b1_pj13 &ltdc_b2_pj14 &ltdc_b3_pj15
&ltdc_b4_pk3 &ltdc_b5_pk4 &ltdc_b6_pk5 &ltdc_b7_pk6
&ltdc_de_pk7 &ltdc_clk_pi14 &ltdc_hsync_pi12 &ltdc_vsync_pi9>;
pinctrl-names = "default";

disp-on-gpios = <&gpiod 7 GPIO_ACTIVE_HIGH>;

ext-sdram = <&sdram2>;
status = "okay";

clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00000008>,
<&rcc STM32_SRC_PLL3_R NO_SEL>;

width = <480>;
height = <272>;
pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
display-timings {
compatible = "zephyr,panel-timing";
de-active = <0>;
pixelclk-active = <0>;
hsync-active = <0>;
vsync-active = <0>;
hsync-len = <1>;
vsync-len = <10>;
hback-porch = <43>;
vback-porch = <12>;
hfront-porch = <8>;
vfront-porch = <4>;
};
def-back-color-red = <0xFF>;
def-back-color-green = <0xFF>;
def-back-color-blue = <0xFF>;
};

&pll {
div-m = <5>;
mul-n = <192>;
Expand All @@ -78,6 +118,16 @@
status = "okay";
};

&pll3 {
div-m = <5>;
mul-n = <192>;
div-p = <2>;
div-q = <20>;
div-r = <99>;
clocks = <&clk_hse>;
status = "okay";
};

&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(480)>;
Expand Down Expand Up @@ -114,13 +164,13 @@
status = "okay";

partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

partition@0 {
reg = <0x0 DT_SIZE_M(64)>;
};
partition@0 {
reg = <0x0 DT_SIZE_M(64)>;
};
};
};

Expand Down