drivers: dma: intel-adsp-hda: optimize L1 exit handling in ISR #81152
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Use the existing 'atomic' bitmask to speed up ISR processing for CONFIG_DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT. This bitmask is used to track enabled DMA channels. In the common case, only a few DMA channels are active and low channels are allocated first. Take advantage of this and not iterate over all DMA channels of all all host devices. Rather break out as soon as L1 exit handling is done for all enabled channels. Signed-off-by: Kai Vehmanen <[email protected]>
Align to coding style and use braces for all if blocks. Signed-off-by: Kai Vehmanen <[email protected]>
kv2019i
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| for (j = 0; j < dma_ctx->dma_channels; j++) { | ||
| if (!atomic_test_bit(dma_ctx->atomic, j)) | ||
| enabled_chs = atomic_get(dma_ctx->atomic); |
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this suggests that the .atomic field cannot change while we're in the ISR? Also not by a different core?
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@lyakh It can change, but it's harmless for this loop as either we do one unnecessary check (for a channel that is already disabled by another core), or we have an additional ISR if it's enabled concurrently.
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@kv2019i ok, sounds good, thanks for explaining! If we ever end up changing this file again, maybe would be good to add this as a comment there
| if (!(enabled_chs & BIT(j))) { | ||
| continue; | ||
| } | ||
| enabled_chs &= ~(BIT(j)); |
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BIT() is properly defined, no need for additional parentheses
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Ok this got merged already, I can fix if we have other changes to do in a follow-up.
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| for (j = 0; j < dma_ctx->dma_channels; j++) { | ||
| if (!atomic_test_bit(dma_ctx->atomic, j)) | ||
| enabled_chs = atomic_get(dma_ctx->atomic); |
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@lyakh It can change, but it's harmless for this loop as either we do one unnecessary check (for a channel that is already disabled by another core), or we have an additional ISR if it's enabled concurrently.
| if (!(enabled_chs & BIT(j))) { | ||
| continue; | ||
| } | ||
| enabled_chs &= ~(BIT(j)); |
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Ok this got merged already, I can fix if we have other changes to do in a follow-up.
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Use the existing 'atomic' bitmask to speed up ISR processing for CONFIG_DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT. This bitmask is used to track enabled DMA channels.
In the common case, only a few DMA channels are active and low channels are allocated first. Take advantage of this and not iterate over all DMA channels of all all host devices. Rather break out as soon as L1 exit handling is done for all enabled channels.