drivers: i3c: Support I3C driver for STM32.

boards/st/nucleo_h563zi/doc/index.rst

@@ -167,6 +167,8 @@ The Zephyr nucleo_h563zi board configuration supports the following hardware fea
 +-----------+------------+-------------------------------------+
 | I2C       | on-chip    | i2c bus                             |
 +-----------+------------+-------------------------------------+
+| I3C       | on-chip    | i3c bus                             |
++-----------+------------+-------------------------------------+
 | UART      | on-chip    | serial port-polling;                |
 |           |            | serial port-interrupt               |
 +-----------+------------+-------------------------------------+
@@ -222,6 +224,7 @@ Default Zephyr Peripheral Mapping:
 - SPI1 SCK/MISO/MOSI/CS: PA5/PG9/PB5/PD14
 - UART3 TX/RX : PD8/PD9 (VCP)
 - USER_PB : PC13
+- I3C1: PD12(SCL) & PD13(SDA)
 
 System Clock
 ------------

boards/st/nucleo_h563zi/nucleo_h563zi-common.dtsi

@@ -78,6 +78,13 @@
 	status = "okay";
 };
 
+&i3c1 {
+	pinctrl-0 =  <&i3c1_scl_pd12 &i3c1_sda_pd13>;
+	pinctrl-names = "default";
+	i3c-scl-hz = <12500000>;
+	status = "okay";
+};
+
 &rcc {
 	clocks = <&pll>;
 	clock-frequency = <DT_FREQ_M(240)>;

boards/st/nucleo_h563zi/nucleo_h563zi.yaml

@@ -25,4 +25,5 @@ supported:
   - usb_device
   - rtc
   - i2c
+  - i3c
 vendor: st

drivers/i3c/CMakeLists.txt

@@ -41,6 +41,11 @@ zephyr_library_sources_ifdef(
   i3c_npcx.c
 )
 
+zephyr_library_sources_ifdef(
+  CONFIG_I3C_STM32
+  i3c_stm32.c
+)
+
 zephyr_library_sources_ifdef(
   CONFIG_I3C_TEST
   i3c_test.c

drivers/i3c/Kconfig

@@ -123,5 +123,6 @@ rsource "Kconfig.nxp"
 rsource "Kconfig.cdns"
 rsource "Kconfig.npcx"
 rsource "Kconfig.test"
+rsource "Kconfig.stm32"
 
 endif # I3C

drivers/i3c/Kconfig.stm32

@@ -0,0 +1,36 @@
+# Copyright (c) 2024 EXALT Technologies.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+module = I3C_STM32
+module-str = i3c_stm32
+
+source "subsys/logging/Kconfig.template.log_config"
+config I3C_STM32
+	bool "STM32 I3C driver support"
+	depends on DT_HAS_ST_STM32_I3C_ENABLED
+	select I3C_IBI_WORKQUEUE if I3C_USE_IBI
+	default y
+	help
+	  Enable support for I3C on STM32 microcontrollers.
+
+if I3C_STM32
+
+config I3C_STM32_DMA
+	bool "STM32 I3C DMA driver support"
+	select DMA
+	help
+	  Enables support for I3C DMA mode on STM32 microcontrollers.
+
+config I3C_STM32_DMA_FIFO_HEAP_SIZE
+	int "Status FIFO and control FIFO heap"
+	depends on I3C_STM32_DMA
+	default 2048
+	help
+	  Configures the heap size for dynamically allocating the regions for
+	  storing status FIFO and control FIFO words which will be used by the DMA.
+	  This value depends on the maximum number of messages that will be sent
+	  during a single transfer. 2KB guarantees enough heap size for sending 256
+	  messages on a single transfer.
+
+endif # I3C_STM32

drivers/i3c/i3c_shell.c

@@ -82,6 +82,7 @@ struct i3c_ctrl {
 DT_FOREACH_STATUS_OKAY(cdns_i3c, I3C_CTRL_FN)
 DT_FOREACH_STATUS_OKAY(nuvoton_npcx_i3c, I3C_CTRL_FN)
 DT_FOREACH_STATUS_OKAY(nxp_mcux_i3c, I3C_CTRL_FN)
+DT_FOREACH_STATUS_OKAY(st_stm32_i3c, I3C_CTRL_FN)
 /* zephyr-keep-sorted-stop */
 
 #define I3C_CTRL_LIST_ENTRY(node_id)                                                               \
@@ -96,6 +97,7 @@ const struct i3c_ctrl i3c_list[] = {
 	DT_FOREACH_STATUS_OKAY(cdns_i3c, I3C_CTRL_LIST_ENTRY)
 	DT_FOREACH_STATUS_OKAY(nuvoton_npcx_i3c, I3C_CTRL_LIST_ENTRY)
 	DT_FOREACH_STATUS_OKAY(nxp_mcux_i3c, I3C_CTRL_LIST_ENTRY)
+	DT_FOREACH_STATUS_OKAY(st_stm32_i3c, I3C_CTRL_LIST_ENTRY)
 	/* zephyr-keep-sorted-stop */
 };