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Use defaults in iCE40 binding #81561

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Merged
nashif merged 1 commit into from
Nov 22, 2024
Merged

Use defaults in iCE40 binding #81561

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12 changes: 4 additions & 8 deletions drivers/fpga/fpga_ice40.c
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Original file line number Diff line number Diff line change
Expand Up @@ -550,17 +550,13 @@ static int fpga_ice40_init(const struct device *dev)

#define FPGA_ICE40_BUS_FREQ(inst) DT_INST_PROP(inst, spi_max_frequency)

#define FPGA_ICE40_CONFIG_DELAY_US(inst) \
DT_INST_PROP_OR(inst, config_delay_us, FPGA_ICE40_CONFIG_DELAY_US_MIN)
#define FPGA_ICE40_CONFIG_DELAY_US(inst) DT_INST_PROP(inst, config_delay_us)

#define FPGA_ICE40_CRESET_DELAY_US(inst) \
DT_INST_PROP_OR(inst, creset_delay_us, FPGA_ICE40_CRESET_DELAY_US_MIN)
#define FPGA_ICE40_CRESET_DELAY_US(inst) DT_INST_PROP(inst, creset_delay_us)

#define FPGA_ICE40_LEADING_CLOCKS(inst) \
DT_INST_PROP_OR(inst, leading_clocks, FPGA_ICE40_LEADING_CLOCKS_MIN)
#define FPGA_ICE40_LEADING_CLOCKS(inst) DT_INST_PROP(inst, leading_clocks)

#define FPGA_ICE40_TRAILING_CLOCKS(inst) \
DT_INST_PROP_OR(inst, trailing_clocks, FPGA_ICE40_TRAILING_CLOCKS_MIN)
#define FPGA_ICE40_TRAILING_CLOCKS(inst) DT_INST_PROP(inst, trailing_clocks)

#define FPGA_ICE40_MHZ_DELAY_COUNT(inst) DT_INST_PROP_OR(inst, mhz_delay_count, 0)

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17 changes: 9 additions & 8 deletions dts/bindings/fpga/lattice,ice40-fpga.yaml
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@henrikbrixandersen henrikbrixandersen Nov 21, 2024

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Default values in bindings need to be explained/justified in the description (please see https://docs.zephyrproject.org/latest/build/dts/bindings-upstream.html#rules-for-default-values).

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@benediktibk benediktibk Nov 21, 2024

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done

Original file line number Diff line number Diff line change
Expand Up @@ -69,25 +69,26 @@ properties:
mhz-delay-count = <0>;
creset-delay-us:
type: int
default: 1
description: |
Delay (in microseconds) between asserting CRESET_B and releasing CRESET_B.
Example usage / default:
creset-delay-us = <1>;
The datasheet specifies a minimum of 200ns, therefore the default is set
to 1us.
config-delay-us:
type: int
default: 1200
description: |
Delay (in microseconds) after releasing CRESET_B to clear internal configuration memory.
Example usage / default:
config-delay-us = <1200>;
The datasheet specifies a minimum of 1200us, which is the default.
leading-clocks:
type: int
default: 8
description: |
Prior to sending the bitstream, issue this number of leading clocks with SPI_CS pulled high.
Example usage / default:
leading-clocks = <8>;
The datasheet specifies 8 dummy cycles, which is the default.
trailing-clocks:
type: int
default: 49
description: |
After sending the bitstream, issue this number of trailing clocks with SPI_CS pulled high.
Example usage / default:
trailing-clocks = <49>;
The datasheet specifies 49 dummy cycles, which is the default.
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