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video: fix dcmipp devicetree #94400

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b7d4a18
drivers: video: stm32_dcmipp: Fix a typo on driver instance name
ngphibang Aug 12, 2025
1ea37c5
drivers: video: stm32_dcmipp: Use normal child nodes for pipes
ngphibang Aug 12, 2025
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2 changes: 1 addition & 1 deletion boards/shields/st_b_cams_imx_mb1854/st_b_cams_imx_mb1854.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@

/ {
chosen {
zephyr,camera = &csi_capture_port;
zephyr,camera = &pipe_main;
};

imx335_input_clock: imx335-input-clock {
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2 changes: 1 addition & 1 deletion boards/shields/st_mb1897_cam/st_mb1897_cam.overlay
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Expand Up @@ -9,7 +9,7 @@

/ {
chosen {
zephyr,camera = &csi_capture_port;
zephyr,camera = &pipe_dump;
};
};

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22 changes: 8 additions & 14 deletions boards/st/stm32mp135f_dk/stm32mp135f_dk.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -188,20 +188,14 @@ csi_interface: &dcmipp {
&dcmipp_pixclk_pb7 &dcmipp_vsync_pg9 &dcmipp_hsync_ph8>;
pinctrl-names = "default";

ports {
port@0 {
dcmipp_ep_in: endpoint {
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
pclk-sample = <0>;
bus-type = <VIDEO_BUS_TYPE_PARALLEL>;
remote-endpoint-label = "mipid02_2";
};
};

port@1 {
csi_capture_port: endpoint { };
port {
dcmipp_ep_in: endpoint {
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
pclk-sample = <0>;
bus-type = <VIDEO_BUS_TYPE_PARALLEL>;
remote-endpoint-label = "mipid02_2";
};
};
};
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10 changes: 2 additions & 8 deletions boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi
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Expand Up @@ -459,13 +459,7 @@ zephyr_udc0: &usbotg_hs1 {
};

csi_interface: &dcmipp {
ports {
port@0 {
csi_ep_in: endpoint { };
};

port@1 {
csi_capture_port: endpoint@1 { };
};
port {
csi_ep_in: endpoint { };
};
};
116 changes: 57 additions & 59 deletions drivers/video/video_stm32_dcmipp.c
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Expand Up @@ -1620,65 +1620,63 @@ static void stm32_dcmipp_isr(const struct device *dev)
#define STM32_DCMIPP_CSI_DT_PARAMS(inst)
#endif

#define STM32_DCMIPP_INIT(inst) \
static void stm32_dcmipp_irq_config_##inst(const struct device *dev) \
{ \
IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), \
stm32_dcmipp_isr, DEVICE_DT_INST_GET(inst), 0); \
irq_enable(DT_INST_IRQN(inst)); \
} \
\
static struct stm32_dcmipp_data stm32_dcmipp_data_##inst = { \
.hdcmipp = { \
.Instance = (DCMIPP_TypeDef *)DT_INST_REG_ADDR(inst), \
}, \
.source_fmt = { \
.pixelformat = \
VIDEO_FOURCC_FROM_STR( \
CONFIG_VIDEO_STM32_DCMIPP_SENSOR_PIXEL_FORMAT), \
.width = CONFIG_VIDEO_STM32_DCMIPP_SENSOR_WIDTH, \
.height = CONFIG_VIDEO_STM32_DCMIPP_SENSOR_HEIGHT, \
}, \
}; \
\
PINCTRL_DT_INST_DEFINE(inst); \
\
static const struct stm32_dcmipp_config stm32_dcmipp_config_##inst = { \
.dcmipp_pclken = \
{.bus = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp, bus), \
.enr = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp, bits)}, \
.dcmipp_pclken_ker = \
{.bus = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp_ker, bus), \
.enr = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp_ker, bits)}, \
.irq_config = stm32_dcmipp_irq_config_##inst, \
.pctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
.source_dev = SOURCE_DEV(inst), \
.reset_dcmipp = RESET_DT_SPEC_INST_GET_BY_IDX(inst, 0), \
.bus_type = DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), bus_type, \
VIDEO_BUS_TYPE_PARALLEL), \
STM32_DCMIPP_CSI_DT_PARAMS(inst) \
.parallel.vs_polarity = DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), \
vsync_active, 0) ? \
DCMIPP_VSPOLARITY_HIGH : \
DCMIPP_VSPOLARITY_LOW, \
.parallel.hs_polarity = DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(n, 0, 0), \
hsync_active, 0) ? \
DCMIPP_HSPOLARITY_HIGH : \
DCMIPP_HSPOLARITY_LOW, \
.parallel.pck_polarity = DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), \
pclk_sample, 0) ? \
DCMIPP_PCKPOLARITY_RISING : \
DCMIPP_PCKPOLARITY_FALLING, \
}; \
\
DEVICE_DT_INST_DEFINE(inst, &stm32_dcmipp_init, \
NULL, &stm32_dcmipp_data_##inst, \
&stm32_dcmipp_config_##inst, \
POST_KERNEL, CONFIG_VIDEO_INIT_PRIORITY, \
NULL); \
\
DT_FOREACH_CHILD_VARGS(DT_INST_PORT_BY_ID(inst, 1), DCMIPP_PIPE_INIT_DEFINE, inst); \
\
#define STM32_DCMIPP_INIT(inst) \
static void stm32_dcmipp_irq_config_##inst(const struct device *dev) \
{ \
IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), stm32_dcmipp_isr, \
DEVICE_DT_INST_GET(inst), 0); \
irq_enable(DT_INST_IRQN(inst)); \
} \
\
static struct stm32_dcmipp_data stm32_dcmipp_data_##inst = { \
.hdcmipp = \
{ \
.Instance = (DCMIPP_TypeDef *)DT_INST_REG_ADDR(inst), \
}, \
.source_fmt = \
{ \
.pixelformat = VIDEO_FOURCC_FROM_STR( \
CONFIG_VIDEO_STM32_DCMIPP_SENSOR_PIXEL_FORMAT), \
.width = CONFIG_VIDEO_STM32_DCMIPP_SENSOR_WIDTH, \
.height = CONFIG_VIDEO_STM32_DCMIPP_SENSOR_HEIGHT, \
}, \
}; \
\
PINCTRL_DT_INST_DEFINE(inst); \
\
static const struct stm32_dcmipp_config stm32_dcmipp_config_##inst = { \
.dcmipp_pclken = {.bus = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp, bus), \
.enr = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp, bits)}, \
.dcmipp_pclken_ker = {.bus = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp_ker, \
bus), \
.enr = DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), dcmipp_ker, \
bits)}, \
.irq_config = stm32_dcmipp_irq_config_##inst, \
.pctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
.source_dev = SOURCE_DEV(inst), \
.reset_dcmipp = RESET_DT_SPEC_INST_GET_BY_IDX(inst, 0), \
.bus_type = DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), bus_type, \
VIDEO_BUS_TYPE_PARALLEL), \
STM32_DCMIPP_CSI_DT_PARAMS(inst).parallel.vs_polarity = \
DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), vsync_active, 0) \
? DCMIPP_VSPOLARITY_HIGH \
: DCMIPP_VSPOLARITY_LOW, \
.parallel.hs_polarity = \
DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), hsync_active, 0) \
? DCMIPP_HSPOLARITY_HIGH \
: DCMIPP_HSPOLARITY_LOW, \
.parallel.pck_polarity = \
DT_PROP_OR(DT_INST_ENDPOINT_BY_ID(inst, 0, 0), pclk_sample, 0) \
? DCMIPP_PCKPOLARITY_RISING \
: DCMIPP_PCKPOLARITY_FALLING, \
}; \
\
DEVICE_DT_INST_DEFINE(inst, &stm32_dcmipp_init, NULL, &stm32_dcmipp_data_##inst, \
&stm32_dcmipp_config_##inst, POST_KERNEL, \
CONFIG_VIDEO_INIT_PRIORITY, NULL); \
\
DT_FOREACH_CHILD_VARGS(DT_INST_CHILD(inst, pipes), DCMIPP_PIPE_INIT_DEFINE, inst); \
\
VIDEO_DEVICE_DEFINE(dcmipp_##inst, DEVICE_DT_INST_GET(inst), SOURCE_DEV(inst));

DT_INST_FOREACH_STATUS_OKAY(STM32_DCMIPP_INIT)
21 changes: 8 additions & 13 deletions dts/arm/st/mp13/stm32mp135.dtsi
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Expand Up @@ -21,25 +21,20 @@
resets = <&rctl STM32_RESET(APB4, 1)>;
status = "disabled";

ports {
pipes {
compatible = "st,stm32-dcmipp-pipes";
#address-cells = <1>;
#size-cells = <0>;

port@0 {
pipe_dump: pipe@0 {
reg = <0>;

endpoint {
remote-endpoint-label = "";
bus-type = <VIDEO_BUS_TYPE_PARALLEL>;
};
};
};
Comment on lines +24 to +32
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By reviewing #94081, it seems only n6 has multiple pipes and this one has just one pipe ? In this case, pipes {} node is not needed and we can remove compatible string too. Otherwise, need to add an if in the dcmipp driver when retrieving the pipe / pipes:

DT_FOREACH_CHILD_VARGS(DT_INST_CHILD(inst, pipes), DCMIPP_PIPE_INIT_DEFINE, inst);


port@1 {
reg = <1>;

dcmipp_pipe_dump: endpoint {
compatible = "st,stm32-dcmipp-pipe";
};
port {
endpoint {
remote-endpoint-label = "";
bus-type = <VIDEO_BUS_TYPE_PARALLEL>;
};
};
};
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37 changes: 13 additions & 24 deletions dts/arm/st/n6/stm32n6.dtsi
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Expand Up @@ -717,39 +717,28 @@
<&rctl STM32_RESET(APB5, 6)>;
status = "disabled";

ports {
pipes {
compatible = "st,stm32-dcmipp-pipes";
#address-cells = <1>;
#size-cells = <0>;

port@0 {
pipe_dump: pipe@0 {
reg = <0>;

endpoint {
remote-endpoint-label = "";
bus-type = <VIDEO_BUS_TYPE_CSI2_DPHY>;
};
};

port@1 {
#address-cells = <1>;
#size-cells = <0>;

pipe_main: pipe@1 {
reg = <1>;
};

dcmipp_pipe_dump: endpoint@0 {
compatible = "st,stm32-dcmipp-pipe";
reg = <0>;
};

dcmipp_pipe_main: endpoint@1 {
compatible = "st,stm32-dcmipp-pipe";
reg = <1>;
};
pipe_aux: pipe@2 {
reg = <2>;
};
};

dcmipp_pipe_aux: endpoint@2 {
compatible = "st,stm32-dcmipp-pipe";
reg = <2>;
};
port {
endpoint {
remote-endpoint-label = "";
bus-type = <VIDEO_BUS_TYPE_CSI2_DPHY>;
};
};
};
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9 changes: 4 additions & 5 deletions dts/bindings/video/st,stm32-dcmipp.yaml
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Expand Up @@ -48,9 +48,8 @@ properties:

child-binding:
child-binding:
child-binding:
include: video-interfaces.yaml
include: video-interfaces.yaml

properties:
bus-type:
required: true
properties:
bus-type:
required: true