Add support for the N308 rcpu in the SpacemiT K1 SoC and BananaPi BPI-F3 board #95248
+387
−0
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
zephyrbot
added
area: RISCV
zephyrbot
requested review from
VynDragon,
carlocaione,
dcpleung,
decsny,
edersondisouza,
fkokosinski,
galak,
katsuster,
kgugala,
mbolivar,
mgielda,
npitre,
rruuaanng,
tgorochowik and
ycsin
|
mbolivar
requested changes
Oct 8, 2025
drivers/serial/uart_ns16550.c
Outdated
Comment on lines
727
to
731
| #ifdef CONFIG_UART_NS16550_PXA | ||
| ns16550_outbyte(dev_cfg, IER(dev), 0x40); | ||
| #else | ||
| ns16550_outbyte(dev_cfg, IER(dev), 0x00); | ||
| #endif |
There was a problem hiding this comment.
No way; this should be handled by a quirk property in the DT compatible at least
There was a problem hiding this comment.
Thanks for your review. I've updated it by introduced a new compatible (intel,xscale-uart) to handle it.
Add spacemit vendor prefix. Signed-off-by: Junhui Liu <[email protected]>
Add support for Intel XScale PXA UART, which requires setting the UART Unit Enable (UUE) bit to enable the UART. This is needed for some SoCs, such as the SpacemiT K1, taht implement the PXA UART variant. Signed-off-by: Junhui Liu <[email protected]>
Add the Nuclei N308 RISC-V core, which is a 32-bit processor in the N300 series, featuring a 3-stage pipeline. Signed-off-by: Junhui Liu <[email protected]>
The SpacemiT K1 SoC integrates a Nuclei N308 RISC-V core as a coprocessor, running at a clock frequency of 32768 * 4 Hz. This describes the N308 core, including 256 KiB of on-chip SRAM, and two XScale PXA UART peripherals. Signed-off-by: Junhui Liu <[email protected]>
Add N308 coprocessor support for the SpacemiT K1 SoC, which features eight X60 Linux cores plus a 32-bit Nuclei N308 microcontroller core. Signed-off-by: Junhui Liu <[email protected]>
Add initial support for the Banana Pi BPI-F3, an industrial grade RISC-V development board based on the SpacemiT K1 SoC (8 * X60 cores + N308 coprocessor). Signed-off-by: Junhui Liu <[email protected]>
|
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
4 participants
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
This PR adds support the Banana Pi BPI-F3 board featuring the SpacemiT K1 SoC with the N308 RISC-V core.
The initial support for the board include timer, interrupt-controller and uart.
Currently, we need to boot the Official Bianbu image provided by the vendor. This will enable the N308 and configure uart0 for the N308(pinctrl, clock and reset). Afterward, the Zephyr application can be loaded by JTAG.
The Bianbu image is required until the mainline kernel provides a remoteproc driver, and until Zephyr adds support for reset, pinctrl and clock drivers.
Relevant Links: