Add kit_pse84_eval basic board and functionality support #95874

mcatee-infineon · 2025-09-11T18:47:47Z

add dts, soc, and board files for ifx kit_pse84_eval board
update pinctrl, clock_control, and uart drivers for kit_pse84_eval board
update hal_infineon module for kit_pse84_eval board

github-actions · 2025-09-11T18:49:37Z

The following west manifest projects have changed revision in this Pull Request:

Name	Old Revision	New Revision	Diff
hal_infineon	zephyrproject-rtos/hal_infineon@`f78b8f8`	zephyrproject-rtos/hal_infineon@`3ef39bd` (`master`)	zephyrproject-rtos/[email protected]

✅ All manifest checks OK

Note: This message is automatically posted and updated by the Manifest GitHub Action.

nordicjm

this PR is wholly non zephyr coding style compliant

nordicjm · 2025-09-12T05:54:02Z

soc/infineon/edge/Kconfig.soc

+config SOC_FAMILY_INFINEON_CAT1
+	bool
+
+config SOC_FAMILY_INFINEON_EDGE
+	bool
+	select SOC_FAMILY_INFINEON_CAT1


you can't have a family selecting a family, this needs to match up with the soc.yml file

This should now be modified to match what other vendors are doing.

soc/infineon/edge/pse84/CMakeLists.txt

nordicjm · 2025-09-12T05:54:37Z

soc/infineon/edge/pse84/Kconfig

+	bool "pse84 m55 core is enabled during setup"
+	default n
+	help
+		This option enables the m55 core on pse84. It is enabled during


this is wrongly formatted and has things like default n for bools

modifications to indentation and removal of "default n" complete. Was there anything else?

nordicjm · 2025-09-12T05:54:54Z

soc/infineon/edge/pse84/Kconfig

+config CORTEX_M_SYSTICK
+	default y


this would go in the Kconfig.defconfig file

This has now been moved

nordicjm · 2025-09-12T05:55:11Z

soc/infineon/edge/pse84/Kconfig

+config BUILD_OUTPUT_ADJUST_LMA
+	depends on XIP
+	depends on CPU_CORTEX_M33
+	default "0x60000000 - $(dt_node_reg_addr_hex,$(dt_nodelabel_path,flash0))"


This has also been moved.

nordicjm · 2025-09-12T06:02:57Z

boards/infineon/kit_pse84_eval/kit_pse84_eval_m33_defconfig

+# Main Stack Size
+CONFIG_MAIN_STACK_SIZE=2048
+


this is never set in defconfig files

This is now removed from the three defconfig files.

nordicjm · 2025-09-12T06:03:22Z

boards/infineon/kit_pse84_eval/sysbuild.cmake

+
+if(SB_CONFIG_BOARD_KIT_PSE84_EVAL_PSE846GPS2DBZC4A_M33)
+
+ExternalZephyrProject_Add(


what is any of this

This is a method for the bootflow of the board m33_secure -> m33_nonsecure -> m55. The --sysbuild command sets CONFIG values for the soc to run a late hook, and setup the next stage. This was done as opposed to standalone apps, as per #90834 (comment).

It seems other vendors are doing something similar under soc/, though with samples/basic/minimal, and using BOARD ${launcher_board} instead of hardcoding the board target.
So this doesn't necessarily seem totally wrong, but honestly I'm not qualified to review this.

other thing is for allowing to use flpr, this here is for tfm however and is not how other tfm-based board targets work

@nordicjm @tomi-font.

The current implementation of the flow for the board's cores is to move from
m33_s -> m33_ns -> m55, in general samples and tests.

We created the sysbuild.cmake file to allow for the building of dependencies. i.e. m55 needs m33_ns/m33_s and m33_ns needs m33_s. The idea we had was to allow for the building and programming of each individual target, if desired. Meanwhile, if someone wanted to build a target with its "dependencies", they could use the "--sysbuild" flag. The intention is to use our specific secure application for the m33_s.

This is similar to the "Building the Secure firmware using Zephyr" section of the index.rst for the nrf5340dk board, without the merging of binaries. We are using the CONFIG_TRUSTED_EXECUTION_SECURE and CONFIG_TRUSTED_EXECUTION_NONSECURE to differentiate between the m33_s and m33_ns. However, we are not using CONFIG_BUILD_WITH_TFM.

nordicjm · 2025-09-12T06:04:38Z

modules/hal_infineon/CMakeLists.txt

 endif()

-if (CONFIG_SOC_FAMILY_INFINEON_CAT1 AND NOT CONFIG_SOC_FAMILY_PSOC6_LEGACY)
+if (CONFIG_SOC_FAMILY_INFINEON_CAT1 AND NOT CONFIG_SOC_FAMILY_PSOC6_LEGACY AND NOT  CONFIG_SOC_FAMILY_INFINEON_EDGE)


no spaces in cmake between if and (, and there is a double space

This should be resolved.

nordicjm · 2025-09-12T06:05:05Z

modules/hal_infineon/mtb-pdl-cat1/CMakeLists.txt

+  set(pdl_dir             ${ZEPHYR_HAL_INFINEON_MODULE_DIR}/mtb-pdl-cat1)
+endif()
+
+set(pdl_drv_dir         ${pdl_dir}/drivers)


Suggested change

set(pdl_drv_dir ${pdl_dir}/drivers)

set(pdl_drv_dir ${pdl_dir}/drivers)

fix all

The extra whitespace should be removed now.

nordicjm · 2025-09-12T06:05:28Z

west.yml

    - name: babblesim
      url-base: https://github.com/BabbleSim

+


Haha. This extra line is no longer present.

nordicjm · 2025-09-15T06:54:50Z

soc/infineon/edge/pse84/CMakeLists.txt

+  zephyr_compile_definitions(FLASH_BOOT)
+
+  set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
+      COMMAND edgeprotecttools image-metadata --image ${PROJECT_BINARY_DIR}/zephyr.hex  --output ${PROJECT_BINARY_DIR}/zephyr.hex --erased-val 0xff --header-size 0x400 --slot-size 0x130000  --hex-addr 0x60100000


no to overwriting an existing file, you can create a new one but do not overwrite a file that the build system has produced

This is not fixed in the current update, but will be addressed in the next update with something like a zephyr-signed.hex as output and flash target. Would that work?

you need to get the bin name correctly since that is a Kconfig then you can set it to that + .signed.hex yes

@nordicjm. This should be resolved now.

soc/infineon/edge/pse84/Kconfig

nordicjm · 2025-09-15T06:56:28Z

soc/infineon/edge/pse84/Kconfig

+	  This option enables the m55 core on pse84. It is enabled during
+	  initialization of the cm33 core in its nonsecure state.
+
+config SOC_PSE84_M33_NS_ENABLE


@tomi-font for comment, this does not look like how tfm is handled in zephyr

Yeah, the one thing I'm wondering about is, what is done with the S/NS split here? There's no TF-M involved here, so @mcatee-infineon what is the goal with this?

The idea was to build and flash the S/NS independently. There are more details in the comment on the related thread.
#95874 (comment)

nordicjm · 2025-09-15T07:00:08Z

soc/infineon/edge/pse84/security_config/pse84_s_mpc.c

+	return return_result;
+}
+
+cy_rslt_t cy_mpc_Init(void)


this is still not snake case

This should be resolved now.

nordicjm · 2025-09-15T07:01:23Z

modules/hal_infineon/mtb-pdl-cat1/CMakeLists.txt

 zephyr_library_sources_ifdef(CONFIG_USE_INFINEON_UART     ${pdl_drv_dir}/source/cy_scb_uart.c)
-zephyr_library_sources_ifdef(CONFIG_USE_INFINEON_FLASH    ${pdl_drv_dir}/source/cy_flash.c)
+if(CONFIG_SOC_FAMILY_INFINEON_EDGE)
+zephyr_code_relocate(FILES ${pdl_drv_dir}/source/cy_scb_uart.c LOCATION RAM)


not indented

This should be resolved now.

nordicjm · 2025-09-15T07:01:49Z

modules/hal_infineon/mtb-template-cat1/CMakeLists.txt

+zephyr_include_directories(${edge_dir}/devices/include)
+
+zephyr_library_sources(${edge_dir}/system_edge.c)
+	if(CONFIG_BOARD_KIT_PSE84_EVAL_PSE846GPS2DBZC4A_M33)


no tabs in cmake

This should be fixed with a move to the 2 space indentation

boards/infineon/kit_pse84_eval/doc/kit_pse84_eval.webp

boards/infineon/kit_pse84_eval/kit_pse84_eval_common.dtsi

nordicjm · 2025-09-15T07:04:02Z

boards/infineon/kit_pse84_eval/sysbuild.cmake

+
+if(SB_CONFIG_BOARD_KIT_PSE84_EVAL_PSE846GPS2DBZC4A_M33)
+
+ExternalZephyrProject_Add(


nordicjm · 2025-09-15T07:04:35Z

drivers/clock_control/clock_control_ifx_fixed_clock.c

+	uint32_t system_clock; /* ifx_cat1_clock_block */
 };

+__WEAK void cycfg_ClockStartupError(uint32_t error)


as above, these are not snake case

This should be fixed now.

karthi012 · 2025-10-07T13:57:48Z

IMO, this PR has lot of issues,

Firstly the commits are not in order, driver changes needs to be commited before the consuming the driver, try to make each commit clear and build/compilable one.
Clock driver is messy, don't know why clk divider requires a node and driver.
Pinctrl for all infineon based soc are looks same, don't know why redefinition, or am i missing something?

mcatee-infineon · 2025-10-07T19:04:20Z

IMO, this PR has lot of issues,

Firstly the commits are not in order, driver changes needs to be commited before the consuming the driver, try to make each commit clear and build/compilable one.

Clock driver is messy, don't know why clk divider requires a node and driver.

Pinctrl for all infineon based soc are looks same, don't know why redefinition, or am i missing something?

Hello @karthi012.

I can reorder the commits in the approximate order of: modules, driver changes, soc, dts, boards, overlays
For this and some other Infineon boards, the peri-div essentially functions as its own block and can be configured to clock different resources. (i.e. scb, tcpwm, sdio). Setting it up as a separate node/driver makes the most sense for its usecase.
I am not quite sure what you are talking about here. If you are speaking on the pinctrl driver, the modifications in this PR are to add support for the kit_pse84_eval and address some structural feedback. If you are speaking on the pinctrl_soc.h file, it is similar to other Infineon socs in Zephyr, but not exactly the same.

nordicjm · 2025-10-02T09:52:48Z

modules/hal_infineon/CMakeLists.txt

+if(CONFIG_SOC_FAMILY_INFINEON_EDGE)
+  if(CONFIG_CPU_CORTEX_M33 AND CONFIG_TRUSTED_EXECUTION_SECURE)
+    # Use secure device in cy_device_headers
+    zephyr_compile_definitions(COMPONENT_SECURE_DEVICE)


this is still not fixed?

nordicjm · 2025-10-09T07:39:17Z

modules/hal_infineon/CMakeLists.txt

 # SPDX-License-Identifier: Apache-2.0

-if(CONFIG_HAS_XMCLIB OR CONFIG_SOC_FAMILY_PSOC6_LEGACY OR CONFIG_SOC_FAMILY_INFINEON_CAT1)
+if(CONFIG_HAS_XMCLIB OR CONFIG_SOC_FAMILY_PSOC6_LEGACY OR CONFIG_SOC_FAMILY_INFINEON_CAT1 OR CONFIG_SOC_FAMILY_INFINEON_EDGE)


SOC_FAMILY_INFINEON_EDGE this Kconfig is referenced in the 1st commit and added in the 6th commit, they are out of order - see #95874 (comment)

That makes sense it. It is rearranged now to where builds are functioning in each commit, aside from the commit renaming files. We have had requests in the past to keep commits renaming files separate from the related functional changes.
The modules commit has been split in two. The first half is still the first commit and it just updates the hash for hal_infineon in the west.yml. The second is after the edge soc is added, and it contains the updates needed for the board.

nordicjm · 2025-10-09T07:39:48Z

soc/infineon/edge/pse84/CMakeLists.txt

+    dt_reg_size(header_size PATH ${m33s_header})
+
+    set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
+        COMMAND edgeprotecttools image-metadata --image ${unsigned_hex} --output ${signed_hex} --erased-val 0xff --hex-addr ${header_addr} --header-size ${header_size}


2 space indent for cmake, split up into multiple lines, max line size is 100

This should be fixed now.

nordicjm · 2025-10-09T07:40:20Z

soc/infineon/edge/pse84/CMakeLists.txt

+  find_program(EDGEPROTECTTOOLS edgeprotecttools OPTIONAL)
+
+  if(${EDGEPROTECTTOOLS} STREQUAL "EDGEPROTECTTOOLS-NOTFOUND")
+    message(WARNING "Could not find edgeprotecttools\nThis will result in a nonfunctional secure cm33. Please consult index.rst for kit_pse84_eval board.")


as above, can remove the \n and have "<blah>" on one line then "<blah2>" on next line and it will output like that

This should be fixed now.

nordicjm · 2025-10-09T07:42:10Z

soc/infineon/edge/pse84/CMakeLists.txt

+zephyr_linker_sources_ifdef(CONFIG_CPU_CORTEX_M55 RWDATA rwdata.ld)
+
+# Edge family defines
+zephyr_compile_definitions_ifdef(CONFIG_CPU_CORTEX_M33 COMPONENT_CM33)


These defines have now been moved and reimplemented in the same way as those previously discussed. #95874 (comment)

- update hal_infineon revision in preparation for new kit_pse84_eval board Signed-off-by: McAtee Maxwell <[email protected]>

- add basic soc files to support ifx pse84 soc - add files needed for setting up the m55 Signed-off-by: McAtee Maxwell <[email protected]>

mcatee-infineon · 2025-10-09T22:10:01Z

@nordicjm This comment should be resolved as far as I see. #95874 (comment)

- update moudle CMakeLists.txt files for new assets - add infineon_kconfig.h file for definitions needed by soc Signed-off-by: McAtee Maxwell <[email protected]>

- add devicetree support for pse84 devices Signed-off-by: McAtee Maxwell <[email protected]>

- rename ifx clock_control drivers - rename infineon,cat1-peri-div yaml - rename ifx clock dt-binding .h file Signed-off-by: McAtee Maxwell <[email protected]>

- add support for kit_pse84_eval board - refactor infineon,fixed-clock binding - refactor infineon,fixed-factor binding - refactor infinein,peri-div binding Signed-off-by: McAtee Maxwell <[email protected]>

- add drive-strength capability for kit_pse84_eval Signed-off-by: McAtee Maxwell <[email protected]>

- update ifx uart driver for kit_pse84_eval board Signed-off-by: McAtee Maxwell <[email protected]>

- add needed board files for kit_pse84_eval board Signed-off-by: McAtee Maxwell <[email protected]>

- add kit_pse84_eval overlays for gpio_basic_api testsuite Signed-off-by: McAtee Maxwell <[email protected]>

sonarqubecloud · 2025-10-10T01:14:53Z

Quality Gate passed

Issues
1 New issue
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
1.4% Duplication on New Code

See analysis details on SonarQube Cloud

nordicjm

Looks good, thanks for fixing issues

dts/bindings/clock/infineon,peri-div.yaml

Requested changes needs to addressed as separate incremental PR with cleanup's for the all the clock consumer and producers. Unblocking this PR.

zephyrbot added area: UART Universal Asynchronous Receiver-Transmitter area: Pinctrl area: Clock Control area: GPIO platform: Infineon Infineon Technologies AG labels Sep 11, 2025

zephyrbot requested review from dcpleung, gmarull, henrikbrixandersen, mnkp, nordic-krch, parthitce, sreeramIfx and talih0 September 11, 2025 18:48

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mcatee-infineon force-pushed the PR/add-kit_pse84_eval-basic-support branch from 7adb05e to ed61e48 Compare September 11, 2025 21:22

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mcatee-infineon force-pushed the PR/add-kit_pse84_eval-basic-support branch 2 times, most recently from c55295c to 5a6af38 Compare October 8, 2025 22:46

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mcatee-infineon added 2 commits October 9, 2025 13:50

modules: update revision of hal_infineon module

bfe459d

- update hal_infineon revision in preparation for new kit_pse84_eval board Signed-off-by: McAtee Maxwell <[email protected]>

soc: add support for ifx edge socs

6fdf1bf

- add basic soc files to support ifx pse84 soc - add files needed for setting up the m55 Signed-off-by: McAtee Maxwell <[email protected]>

mcatee-infineon force-pushed the PR/add-kit_pse84_eval-basic-support branch 2 times, most recently from 88904b1 to 0c4e9da Compare October 9, 2025 22:07

mcatee-infineon requested a review from nordicjm October 9, 2025 22:20

mcatee-infineon added 8 commits October 9, 2025 17:42

modules: update hal_infineon module for infineon "edge" soc

066b046

- update moudle CMakeLists.txt files for new assets - add infineon_kconfig.h file for definitions needed by soc Signed-off-by: McAtee Maxwell <[email protected]>

dts: add devicetree support for ifx edge devices

7344434

- add devicetree support for pse84 devices Signed-off-by: McAtee Maxwell <[email protected]>

drivers: clock_control: rename files related to ifx clock_control

1cd9b84

- rename ifx clock_control drivers - rename infineon,cat1-peri-div yaml - rename ifx clock dt-binding .h file Signed-off-by: McAtee Maxwell <[email protected]>

drivers: clock_control: add clock_control support for kit_pse84_eval

8535f2c

- add support for kit_pse84_eval board - refactor infineon,fixed-clock binding - refactor infineon,fixed-factor binding - refactor infinein,peri-div binding Signed-off-by: McAtee Maxwell <[email protected]>

drivers: add ifx pinctrl driver updates for kit_pse84_eval

1b6784e

- add drive-strength capability for kit_pse84_eval Signed-off-by: McAtee Maxwell <[email protected]>

drivers: uart: update ifx uart_pdl driver for kit_pse84_eval

5bcd5fa

- update ifx uart driver for kit_pse84_eval board Signed-off-by: McAtee Maxwell <[email protected]>

boards: add support for ifx kit_pse84_eval

244a7a6

- add needed board files for kit_pse84_eval board Signed-off-by: McAtee Maxwell <[email protected]>

tests: add kit_pse84_eval overlays for gpio_basic_api testsuite

18ea244

- add kit_pse84_eval overlays for gpio_basic_api testsuite Signed-off-by: McAtee Maxwell <[email protected]>

mcatee-infineon force-pushed the PR/add-kit_pse84_eval-basic-support branch from 0c4e9da to 18ea244 Compare October 10, 2025 00:49

nordicjm approved these changes Oct 10, 2025

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tejlmand mentioned this pull request Oct 10, 2025

boards: nordic: add support for TF-m to nrf7120 nrfconnect/sdk-nrf#24475

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dts/bindings/clock/infineon,peri-div.yaml Show resolved Hide resolved

cfriedt merged commit c47e606 into zephyrproject-rtos:main Oct 10, 2025
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		if(SB_CONFIG_BOARD_KIT_PSE84_EVAL_PSE846GPS2DBZC4A_M33)

		ExternalZephyrProject_Add(

	set(pdl_drv_dir ${pdl_dir}/drivers)
	set(pdl_drv_dir ${pdl_dir}/drivers)

Add kit_pse84_eval basic board and functionality support #95874

Add kit_pse84_eval basic board and functionality support #95874

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mcatee-infineon commented Sep 11, 2025

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github-actions bot commented Sep 11, 2025 •

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