Skip to content

Enable i2s_codec sample on mcxn5xx_evk #96954

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 4 commits into
base: main
Choose a base branch
from
Open

Enable i2s_codec sample on mcxn5xx_evk #96954

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
4 commits
Select commit Hold shift + click to select a range
3919bdb
soc: mcxnx4x: Instantiate MICFIL
VitekST Aug 28, 2025
542bfb4
board: mcx_n5xx: Enable MICFIL and da7212 codec on mcx_n5xx
TomasBarakNXP Oct 3, 2025
89451d2
board: mcx_nx4x: format board.c
TomasBarakNXP Oct 3, 2025
2c9d813
samples: i2s_codec: enable i2s_codec sample for mcx_n5xx_evk
TomasBarakNXP Oct 3, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
64 changes: 37 additions & 27 deletions boards/nxp/mcx_nx4x_evk/board.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -18,14 +18,16 @@
#define BOARD_USB_PHY_TXCAL45DM (0x07U)

Copy link
Contributor

@dbaluta dbaluta Oct 3, 2025 •
edited
Loading

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

A commit message should be focused on why the changes is needed and less on what is does. What it does should be somehow obvious from the code (if it is not then explain it briefly in the commit message).

So here your commit message should be something like this:

 board: mcx_nx4x: Fix formatting 

In order to make style more consistent and code easier to read
fix some style issues:
- add enum values each on a single line
- fixes multiple whitespaces in macro definitions

Signed-off-by: Tomas Barak <[email protected]>

If those were detected by a tool (e.g checkpatch.pl) please also mention this in the commit message.

Also, this change can be marked as trivial sent in a different PR and merged faster your if current PR is delayed by some dependencies.

usb_phy_config_struct_t usbPhyConfig = {
BOARD_USB_PHY_D_CAL, BOARD_USB_PHY_TXCAL45DP, BOARD_USB_PHY_TXCAL45DM,
BOARD_USB_PHY_D_CAL,
BOARD_USB_PHY_TXCAL45DP,
BOARD_USB_PHY_TXCAL45DM,
};
#endif

/* Board xtal frequency in Hz */
#define BOARD_XTAL0_CLK_HZ 24000000U
#define BOARD_XTAL0_CLK_HZ 24000000U
/* Core clock frequency: 150MHz */
#define CLOCK_INIT_CORE_CLOCK 150000000U
#define CLOCK_INIT_CORE_CLOCK 150000000U
/* System clock frequency. */
extern uint32_t SystemCoreClock;

Expand All @@ -34,21 +36,21 @@ void power_mode_od(void)
{
/* Set the DCDC VDD regulator to 1.2 V voltage level */
spc_active_mode_dcdc_option_t opt = {
.DCDCVoltage = kSPC_DCDC_OverdriveVoltage,
.DCDCVoltage = kSPC_DCDC_OverdriveVoltage,
.DCDCDriveStrength = kSPC_DCDC_NormalDriveStrength,
};
SPC_SetActiveModeDCDCRegulatorConfig(SPC0, &opt);

/* Set the LDO_CORE VDD regulator to 1.2 V voltage level */
spc_active_mode_core_ldo_option_t ldo_opt = {
.CoreLDOVoltage = kSPC_CoreLDO_OverDriveVoltage,
.CoreLDOVoltage = kSPC_CoreLDO_OverDriveVoltage,
.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength,
};
SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldo_opt);

/* Specifies the 1.2V operating voltage for the SRAM's read/write timing margin */
spc_sram_voltage_config_t cfg = {
.operateVoltage = kSPC_sramOperateAt1P2V,
.operateVoltage = kSPC_sramOperateAt1P2V,
.requestVoltageUpdate = true,
};
SPC_SetSRAMOperateVoltage(SPC0, &cfg);
Expand Down Expand Up @@ -115,14 +117,12 @@ void board_early_init_hook(void)
#endif

/* Set up PLL0 */
const pll_setup_t pll0Setup = {
.pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) |
SCG_APLLCTRL_SELP(13U),
.pllndiv = SCG_APLLNDIV_NDIV(8U),
.pllpdiv = SCG_APLLPDIV_PDIV(1U),
.pllmdiv = SCG_APLLMDIV_MDIV(50U),
.pllRate = 150000000U
};
const pll_setup_t pll0Setup = {.pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) |
SCG_APLLCTRL_SELP(13U),
.pllndiv = SCG_APLLNDIV_NDIV(8U),
.pllpdiv = SCG_APLLPDIV_PDIV(1U),
.pllmdiv = SCG_APLLMDIV_MDIV(50U),
.pllRate = 150000000U};
/* Configure PLL0 to the desired values */
CLOCK_SetPLL0Freq(&pll0Setup);
/* PLL0 Monitor is disabled */
Expand All @@ -136,20 +136,20 @@ void board_early_init_hook(void)

CLOCK_SetupExtClocking(BOARD_XTAL0_CLK_HZ);

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I wonder if you can enable them in separate patches? If one of them breaks the system one of them would have a hard time doing a bisection.

Please use 1 commit per a logical change so that code can be easier to be reviewed and also bisection and debugging in the future be easier.

#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai0)) || DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai1))
#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai0)) || DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai1)) || \
DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(micfil))
/* < Set up PLL1 */
const pll_setup_t pll1_Setup = {
.pllctrl = SCG_SPLLCTRL_SOURCE(1U) | SCG_SPLLCTRL_SELI(3U) |
SCG_SPLLCTRL_SELP(1U),
.pllndiv = SCG_SPLLNDIV_NDIV(25U),
.pllpdiv = SCG_SPLLPDIV_PDIV(10U),
.pllmdiv = SCG_SPLLMDIV_MDIV(256U),
.pllRate = 24576000U};
const pll_setup_t pll1_Setup = {.pllctrl = SCG_SPLLCTRL_SOURCE(1U) | SCG_SPLLCTRL_SELI(3U) |
SCG_SPLLCTRL_SELP(1U),
.pllndiv = SCG_SPLLNDIV_NDIV(25U),
.pllpdiv = SCG_SPLLPDIV_PDIV(10U),
.pllmdiv = SCG_SPLLMDIV_MDIV(256U),
.pllRate = 24576000U};

/* Configure PLL1 to the desired values */
CLOCK_SetPLL1Freq(&pll1_Setup);
/* Set PLL1 CLK0 divider to value 1 */
CLOCK_SetClkDiv(kCLOCK_DivPLL1Clk0, 1U);
CLOCK_SetClkDiv(kCLOCK_DivPLL1Clk0, 2U);
#endif

#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm0))
Expand Down Expand Up @@ -213,6 +213,7 @@ void board_early_init_hook(void)

#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio0))
CLOCK_EnableClock(kCLOCK_Gpio0);
CLOCK_EnableClock(kCLOCK_Port0);
#endif

#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio1))
Expand Down Expand Up @@ -355,8 +356,8 @@ void board_early_init_hook(void)
while (0U == (SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK)) {
};
}
SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK |
SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK;
SYSCON->AHBCLKCTRLSET[2] |=
SYSCON_AHBCLKCTRL2_USB_HS_MASK | SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK;
SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK);
/* xtal = 20 ~ 30MHz */
SCG0->SOSCCFG = (1U << SCG_SOSCCFG_RANGE_SHIFT) | (1U << SCG_SOSCCFG_EREFS_SHIFT);
Expand All @@ -366,8 +367,8 @@ void board_early_init_hook(void)
break;
}
}
SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK |
SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK;
SYSCON->CLOCK_CTRL |=
SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK | SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK;
CLOCK_EnableClock(kCLOCK_UsbHs);
CLOCK_EnableClock(kCLOCK_UsbHsPhy);
CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, BOARD_XTAL0_CLK_HZ);
Expand Down Expand Up @@ -450,6 +451,15 @@ void board_early_init_hook(void)
CLOCK_EnableClock(kCLOCK_Sai1);
#endif

#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(micfil))
CLOCK_SetClkDiv(kCLOCK_DivMicfilFClk, 1U);
CLOCK_AttachClk(kPLL1_CLK0_to_MICFILF);
CLOCK_EnableClock(kCLOCK_Micfil);

PORT0->PCR[16] = 0x00001900;
PORT0->PCR[17] = 0x00001900;
#endif

/* Set SystemCoreClock variable. */
SystemCoreClock = CLOCK_INIT_CORE_CLOCK;
}
6 changes: 6 additions & 0 deletions boards/nxp/mcx_nx4x_evk/mcx_n5xx_evk.dtsi
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7,3 +7,9 @@
#include <nxp/nxp_mcxn54x.dtsi>
#include "mcx_nx4x_evk.dtsi"
#include "mcx_n5xx_evk-pinctrl.dtsi"

&micfil {
status = "okay";
pinctrl-0 = <&pinmux_micfil>;
pinctrl-names = "default";
};

Check warning on line 15 in boards/nxp/mcx_nx4x_evk/mcx_n5xx_evk.dtsi

View workflow job for this annotation

GitHub Actions / Run compliance checks on patch series (PR)

MISSING_EOF_NEWLINE 

boards/nxp/mcx_nx4x_evk/mcx_n5xx_evk.dtsi:15  adding a line without newline at end of file

Check warning on line 15 in boards/nxp/mcx_nx4x_evk/mcx_n5xx_evk.dtsi

View workflow job for this annotation

GitHub Actions / Run compliance checks on patch series (PR)

MISSING_EOF_NEWLINE 

boards/nxp/mcx_nx4x_evk/mcx_n5xx_evk.dtsi:15  adding a line without newline at end of file
26 changes: 25 additions & 1 deletion boards/nxp/mcx_nx4x_evk/mcx_nx4x_evk-pinctrl.dtsi
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -92,7 +92,8 @@

pinmux_sai1: pinmux_sai1 {
group0 {
pinmux = <SAI1_TX_BCLK_PIO3_16>,
pinmux = <SAI1_MCLK_PIO1_21>,
<SAI1_TX_BCLK_PIO3_16>,
<SAI1_TX_FS_PIO3_17>,
<SAI1_TXD0_PIO3_20>,
<SAI1_RX_FS_PIO3_19>,
Expand All @@ -104,6 +105,18 @@
};
};

pinmux_flexcomm2_i2c: pinmux_flexcomm2_i2c {
group0 {
pinmux = <FC2_P0_PIO4_0>,
<FC2_P1_PIO4_1>;
slew-rate = "fast";
drive-strength = "low";
input-enable;
bias-pull-up;
drive-open-drain;
};
};

pinmux_enet_qos: pinmux_enet_qos {
mdio_group {
pinmux = <ENET0_MDC_PIO1_20>,
Expand Down Expand Up @@ -237,4 +250,15 @@
bias-pull-up;
};
};

pinmux_micfil: pinmux_micfil {
group0 {
pinmux = <PDM0_CLK_PIO0_16>,
<PDM0_DATA0_PIO0_17>,
<PDM0_DATA1_PIO0_18>;
slew-rate = "fast";
drive-strength = "low";
input-enable;
};
};
};
13 changes: 13 additions & 0 deletions boards/nxp/mcx_nx4x_evk/mcx_nx4x_evk_cpu0.dtsi
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -100,6 +100,19 @@

&flexcomm2_lpi2c2 {
status = "okay";
pinctrl-0 = <&pinmux_flexcomm2_i2c>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;

audio_codec: da7212@1a {
compatible = "dialog,da7212";
reg = <0x1a>;
clocks = <&syscon MCUX_SAI1_CLK>;
clock-source = "MCLK";
clock-names = "mclk";
};
};

/*
Expand Down
73 changes: 73 additions & 0 deletions dts/arm/nxp/nxp_mcxnx4x_common.dtsi
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -660,6 +660,79 @@
#io-channel-cells = <1>;
};

micfil: micfil@10c000 {
#address-cells = <1>;
#size-cells = <0>;

compatible = "nxp,micfil";
reg = <0x10c000 0x1000>;

interrupts = <48 0>;
clocks = <&syscon MCUX_MICFIL_CLK>;
quality-mode = <1>;
cic-decimation-rate = <0>;
fifo-watermark = <15>;
sample-rate = <16000>;

status = "disabled";

channel0: micfil-channel@0 {
reg = <0>;
dc-remover-cutoff-freq = <2>;
decimation-filter-gain = <4>;
status = "disabled";
};

channel1: micfil-channel@1 {
reg = <1>;
dc-remover-cutoff-freq = <2>;
decimation-filter-gain = <4>;
status = "disabled";
};

channel2: micfil-channel@2 {
reg = <2>;
dc-remover-cutoff-freq = <2>;
decimation-filter-gain = <4>;
status = "disabled";
};

channel3: micfil-channel@3 {
reg = <3>;
dc-remover-cutoff-freq = <2>;
decimation-filter-gain = <4>;
status = "disabled";
};

channel4: micfil-channel@4 {
reg = <4>;
dc-remover-cutoff-freq = <2>;
decimation-filter-gain = <4>;
status = "disabled";
};

channel5: micfil-channel@5 {
reg = <5>;
dc-remover-cutoff-freq = <2>;
decimation-filter-gain = <4>;
status = "disabled";
};

channel6: micfil-channel@6 {
reg = <6>;
dc-remover-cutoff-freq = <2>;
decimation-filter-gain = <4>;
status = "disabled";
};

channel7: micfil-channel@7 {
reg = <7>;
dc-remover-cutoff-freq = <2>;
decimation-filter-gain = <4>;
status = "disabled";
};
};

enet: ethernet@40100000 {
compatible = "nxp,enet-qos";
reg = <0x40100000 0x1200>;
Expand Down
14 changes: 14 additions & 0 deletions samples/drivers/i2s/i2s_codec/boards/mcx_n5xx_evk_mcxn547_cpu0.conf
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
# Copyright 2025 NXP
#
# SPDX-License-Identifier: Apache-2.0
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Commit message body is not giving us any extra info. We should try to use more of a natural language description of what the change is about focusing mostly on why the change is needed.

Also mention in the commit message things that are out of the ordinary which people reading the git log history might want to be aware about.

Commit title is nice and clear mostly saying what we need to now.

So, the commit message should look something like this:

samples: i2s_codec: enable i2s_codec sample for mcx_n5xx_evk

In order to test <insert your scenario here> on mcx_n5xx_evk we need to
configure dts nodes for SAI1 interface and MICFIL channels and
also enable some config options for DMA, I2S and DMIC.

Note that we are using newly introduced I2s params (bytes_per_sample, sample_widht, extra_blocks).

Signed-off-by: Tomas Barak [email protected]


CONFIG_DMA_TCD_QUEUE_SIZE=4
CONFIG_AUDIO_CODEC_DA7212=y
CONFIG_SAMPLE_FREQ=16000
CONFIG_I2S_INIT_BUFFERS=1
CONFIG_USE_CODEC_CLOCK=y
CONFIG_USE_DMIC=y
CONFIG_DMIC_CHANNELS=2
CONFIG_EXTRA_BLOCKS=10
CONFIG_SAMPLE_WIDTH=32
CONFIG_BYTES_PER_SAMPLE=4
26 changes: 26 additions & 0 deletions samples/drivers/i2s/i2s_codec/boards/mcx_n5xx_evk_mcxn547_cpu0.overlay
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,26 @@
/*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
aliases {
i2s-codec-tx = &sai1;
i2s-tx = &sai1;
};
};

&sai1 {
mclk-output;
};

dmic_dev: &micfil {
channel0: micfil-channel@0 {
status = "okay";
};

channel1: micfil-channel@1 {
status = "okay";
};
};
1 change: 1 addition & 0 deletions samples/drivers/i2s/i2s_codec/sample.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ tests:
- mimxrt1060_evk/mimxrt1062/qspi
- mimxrt1180_evk/mimxrt1189/cm33
- mimxrt1180_evk/mimxrt1189/cm7
- mcx_n5xx_evk/mcxn547/cpu0
harness: console
harness_config:
type: one_line
Expand Down
Loading