sam_e54_xpro : Add support for PWM using tcc peripheral

dts/arm/microchip/sam/sam_d5x_e5x/common/samd5xe5x.dtsi

@@ -5,6 +5,7 @@
  */
 
 #include <arm/armv7-m.dtsi>
+#include <zephyr/dt-bindings/pwm/pwm.h>
 #include <zephyr/dt-bindings/clock/mchp_sam_d5x_e5x_clock.h>
 
 / {
@@ -117,6 +118,39 @@
 			clock-names = "mclk", "gclk";
 		};
 
+		tcc0: tcc@41016000 {
+			compatible = "microchip,tcc-g1";
+			reg = <0x41016000 0x2000>;
+			interrupts = <85 0>, <86 0>, <87 0>, <88 0>, <89 0>, <90 0>, <91 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBB_TCC0>,
+				 <&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_TCC0>;
+			clock-names = "mclk", "gclk";
+			max-bit-width = <24>;
+			channels = <6>;
+		};
+
+		tcc1: tcc@41018000 {
+			compatible = "microchip,tcc-g1";
+			reg = <0x41018000 0x2000>;
+			interrupts = <92 0>, <93 0>, <94 0>, <95 0>, <96 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBB_TCC1>,
+				 <&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_TCC1>;
+			clock-names = "mclk", "gclk";
+			max-bit-width = <24>;
+			channels = <4>;
+		};
+
+		tcc2: tcc@42000c00 {
+			compatible = "microchip,tcc-g1";
+			reg = <0x42000c00 0x2000>;
+			interrupts = <97 0>, <98 0>, <99 0>, <100 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBC_TCC2>,
+				 <&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_TCC2>;
+			clock-names = "mclk", "gclk";
+			max-bit-width = <16>;
+			channels = <3>;
+		};
+
 		sercom4: sercom@43000000 {
 			compatible = "microchip,sercom-g1";
 			status = "disabled";

dts/arm/microchip/sam/sam_d5x_e5x/common/samd5xe5x_j.dtsi

@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		tcc3: tcc@42001000 {
+			compatible = "microchip,tcc-g1";
+			reg = <0x42001000 0x2000>;
+			interrupts = <101 0>, <102 0>, <103 0>;
+			clocks = <&mclkperiphperiph CLOCK_MCHP_MCLKPERIPH_ID_APBC_TCC3>,
+				 <&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_TCC3>;
+			clock-names = "mclk", "gclk";
+			max-bit-width = <16>;
+			channels = <2>;
+		};
+
+		tcc4: tcc@43001000 {
+			compatible = "microchip,tcc-g1";
+			reg = <0x43001000 0x2000>;
+			interrupts = <104 0>, <105 0>, <106 0>;
+			clocks = <&mclkperiphperiph CLOCK_MCHP_MCLKPERIPH_ID_APBD_TCC4>,
+				 <&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_TCC4>;
+			clock-names = "mclk", "gclk";
+			max-bit-width = <16>;
+			channels = <2>;
+		};
+	};
+};

dts/arm/microchip/sam/sam_d5x_e5x/common/samd5xe5x_n.dtsi

@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		tcc3: tcc@42001000 {
+			compatible = "microchip,tcc-g1";
+			reg = <0x42001000 0x2000>;
+			interrupts = <101 0>, <102 0>, <103 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBC_TCC3>,
+				 <&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_TCC3>;
+			clock-names = "mclk", "gclk";
+			max-bit-width = <16>;
+			channels = <2>;
+		};
+
+		tcc4: tcc@43001000 {
+			compatible = "microchip,tcc-g1";
+			reg = <0x43001000 0x2000>;
+			interrupts = <104 0>, <105 0>, <106 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBD_TCC4>,
+				 <&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_TCC4>;
+			clock-names = "mclk", "gclk";
+			max-bit-width = <16>;
+			channels = <2>;
+		};
+	};
+};

dts/arm/microchip/sam/sam_d5x_e5x/common/samd5xe5x_p.dtsi

@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		tcc3: tcc@42001000 {
+			compatible = "microchip,tcc-g1";
+			reg = <0x42001000 0x2000>;
+			interrupts = <101 0>, <102 0>, <103 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBC_TCC3>,
+				 <&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_TCC3>;
+			clock-names = "mclk", "gclk";
+			max-bit-width = <16>;
+			channels = <2>;
+		};
+
+		tcc4: tcc@43001000 {
+			compatible = "microchip,tcc-g1";
+			reg = <0x43001000 0x2000>;
+			interrupts = <104 0>, <105 0>, <106 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBD_TCC4>,
+				 <&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_TCC4>;
+			clock-names = "mclk", "gclk";
+			max-bit-width = <16>;
+			channels = <2>;
+		};
+	};
+};

dts/bindings/counter/microchip,tcc-g1.yaml

@@ -0,0 +1,71 @@
+# Copyright (c) 2025 Microchip Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+  Microchip TCC G1 timer counter peripheral.
+
+  This peripheral is used for generating PWM signals.
+  This compatible string is to be used for the following peripherals:
+    - module name="TCC" id="U2213" version="3.1.0"
+
+compatible: "microchip,tcc-g1"
+
+include:
+  - name: base.yaml
+  - name: pinctrl-device.yaml
+
+properties:
+  reg:
+    description: |
+      Specifies the base address and size of the register set for the timer counter peripheral.
+    required: true
+
+  interrupts:
+    description: |
+      Defines the interrupt lines used by the timer counter peripheral.
+
+      This property specifies the interrupt number and priority.
+    required: true
+
+  clocks:
+    description: |
+      Specifies the clock sources and their configurations for the timer counter peripheral.
+
+      This property ensures the peripheral is provided with the necessary clock signals.
+    required: true
+
+  prescaler:
+    type: int
+    description: |
+      Timer prescaler values.
+
+      The prescaler divides the input clock frequency to
+      achieve the desired timer frequency.
+    enum:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+      - 64
+      - 256
+      - 1024
+
+  channels:
+    type: int
+    required: true
+    description: |
+      This specifies the maximum number of channels available for the peripheral instance.
+
+  max-bit-width:
+    type: int
+    required: true
+    description: |
+      Maximum bit width supported by the counter.
+
+      This property specifies the resolution of the counter. The value provided in the device tree
+      should reflect the maximum supported by the hardware instance. It should only be overridden
+      after consulting the relevant family datasheet to ensure compatibility.
+    enum:
+      - 16
+      - 24

dts/bindings/pwm/microchip,tcc-g1-pwm.yaml

@@ -0,0 +1,30 @@
+# Copyright (c) 2025 Microchip Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+# Description of the Microchip TCC PWM driver
+description: |
+  Microchip TCC pwm driver.
+
+  This driver is used for configuring
+  and managing TCC (Timer/ Counter for Control Applications)
+  peripheral in Microchip microcontrollers. This peripherals
+  support creating PWM signals. The supported peripherals are
+  as follows:
+    - module name="TCC" id="U2213" version="3.1.0"
+
+compatible: "microchip,tcc-g1-pwm"
+
+include:
+  - base.yaml
+  - pwm-controller.yaml
+  - microchip,tcc-g1.yaml
+  - pinctrl-device.yaml
+
+properties:
+  "#pwm-cells":
+    const: 3
+
+pwm-cells:
+  - channel
+  - period
+  - polarity