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5 changes: 2 additions & 3 deletions drivers/flash/Kconfig.stm32
Original file line number Diff line number Diff line change
Expand Up @@ -99,8 +99,7 @@ config USE_MICROCHIP_QSPI_FLASH_WITH_STM32
bool "Include patch for Microchip qspi flash when running with stm32"
depends on DT_HAS_ST_STM32_QSPI_NOR_ENABLED
help
Set to use Microchip qspi flash memories which supports
the Global Block Protection Unlock instruction (ULBPR - 98H),
and write with SPI_NOR_CMD_PP_1_1_4 on 4 lines
Set to use Microchip QSPI flash memories which use the PP_1_1_4 opcode
(32H) for the PP_1_4_4 operation (usually 38H).

endif # SOC_FLASH_STM32
11 changes: 5 additions & 6 deletions drivers/flash/flash_stm32_qspi.c
Original file line number Diff line number Diff line change
Expand Up @@ -282,15 +282,14 @@ static inline int qspi_prepare_quad_program(const struct device *dev,

cmd->Instruction = dev_data->qspi_write_cmd;
#if defined(CONFIG_USE_MICROCHIP_QSPI_FLASH_WITH_STM32)
/* Microchip qspi-NOR flash, does not follow the standard rules */
if (cmd->Instruction == SPI_NOR_CMD_PP_1_1_4) {
cmd->AddressMode = QSPI_ADDRESS_4_LINES;
/* Microchip QSPI-NOR flash uses the PP_1_1_4 opcode for the PP_1_4_4 operation */
if (cmd->Instruction == SPI_NOR_CMD_PP_1_4_4) {
cmd->Instruction = SPI_NOR_CMD_PP_1_1_4;
}
#else
cmd->AddressMode = ((cmd->Instruction == SPI_NOR_CMD_PP_1_1_4)
#endif /* CONFIG_USE_MICROCHIP_QSPI_FLASH_WITH_STM32 */
cmd->AddressMode = ((dev_data->qspi_write_cmd == SPI_NOR_CMD_PP_1_1_4)
? QSPI_ADDRESS_1_LINE
: QSPI_ADDRESS_4_LINES);
#endif /* CONFIG_USE_MICROCHIP_QSPI_FLASH_WITH_STM32 */
cmd->DataMode = QSPI_DATA_4_LINES;
cmd->DummyCycles = 0;

Expand Down