Add basic support for Microchip PIC32CZ CA Family devices

boards/microchip/pic32c/pic32cz_ca80_cult/Kconfig.pic32cz_ca80_cult

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+# Copyright (c) 2025 Microchip Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_PIC32CZ_CA80_CULT
+	select SOC_PIC32CZ8110CA80208

boards/microchip/pic32c/pic32cz_ca80_cult/board.cmake

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+# Copyright (c) 2025 Microchip Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=PIC32CZ8110CA80" "--speed=4000")
+
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/microchip/pic32c/pic32cz_ca80_cult/board.yml

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+# Copyright (c) 2025 Microchip Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+board:
+  name: pic32cz_ca80_cult
+  full_name: PIC32CZ CA80 Curiosity Ultra
+  vendor: microchip
+  socs:
+    - name: pic32cz8110ca80208

boards/microchip/pic32c/pic32cz_ca80_cult/doc/index.rst

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+.. zephyr:board:: pic32cz_ca80_cult
+
+Overview
+********
+
+The PIC32CZ CA80 Curiosity Ultra development board is a hardware platform
+to evaluate the Microchip PIC32CZ CA80 microcontroller, and the
+development board part number is EV51S73A. The development board offers a
+set of features that enables the PIC32CZ CA80 users to get started with
+the PIC32CZ CA80 peripherals, and to obtain an understanding of how to
+integrate the device in their own design.
+
+Hardware
+********
+
+- 208-Pin TFBGA PIC32CZ8110 CA80 microcontroller
+- 32.768 kHz crystal oscillator
+- 8M flash memory and 1M of RAM
+- Xplained pro extension compatible interface
+- Two yellow user LEDs
+- Two mechanical user push button
+- One reset button
+- Virtual COM port (VCOM)
+- Programming and debugging of on-board PIC32CZ CA80 through Serial Wire Debug (SWD)
+- Arduino uno R3 compatible interface
+- MikroBus Socket
+- On-board temperature sensor
+- Graphics interface
+- G-bit Ethernet
+- 2 high-speed USB (Type-C and Micro A/B)
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+Connections and IOs
+===================
+
+The `PIC32CZ CA80 Curiosity Ultra User Guide`_ has detailed information about board connections.
+
+Programming & Debugging
+***********************
+
+.. zephyr:board-supported-runners::
+
+Flash Using J-Link
+==================
+
+To flash the board using the J-Link debugger, follow the steps below:
+
+1. Install J-Link Software
+
+   - Download and install the `J-Link software <https://www.segger.com/downloads/jlink>`_ tools from Segger.
+   - Make sure the installed J-Link executables (e.g., ``JLink``, ``JLinkGDBServer``) are available in your system's PATH.
+
+2. Connect the Board
+
+   - Connect the `J32 Debug Probe <https://www.microchip.com/en-us/development-tool/dv164232>`_ to the board's **CORTEX DEBUG** header.
+   - Connect the other end of the J32 Debug Probe to your **host machine (PC)** via USB.
+   - Connect the DEBUG USB port on the board to your host machine to **power up the board**.
+
+3. Build the Application
+
+   You can build a sample Zephyr application, such as **Blinky**, using the ``west`` tool. Run the following commands from your Zephyr workspace:
+
+   .. code-block:: console
+
+      west build -b pic32cz_ca80_cult -p -s samples/basic/blinky
+
+   This will build the Blinky application for the ``pic32cz_ca80_cult`` board.
+
+4. Flash the Device
+
+   Once the build completes, flash the firmware using:
+
+   .. code-block:: console
+
+      west flash
+
+   This uses the default ``jlink`` runner to flash the application to the board.
+
+5. Observe the Result
+
+   After flashing, **LED0** on the board should start **blinking**, indicating that the application is running successfully.
+
+References
+**********
+
+PIC32CZ CA80 Product Page:
+    https://www.microchip.com/en-us/product/PIC32CZ8110CA80208
+
+PIC32CZ CA80 Curiosity Ultra Development Board Page:
+    https://www.microchip.com/en-us/development-tool/ev51s73a
+
+.. _PIC32CZ CA80 Curiosity Ultra User Guide:
+    https://ww1.microchip.com/downloads/aemDocuments/documents/MCU32/ProductDocuments/UserGuides/PIC32CZ-CA80-CA90-Curiosity-Ultra-User-Guide-DS70005522.pdf

boards/microchip/pic32c/pic32cz_ca80_cult/pic32cz_ca80_cult.dts

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+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <microchip/pic32c/pic32cz_ca/pic32cz_ca80/pic32cz8110ca80208.dtsi>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "PIC32CZ CA80 Curiosity Ultra";
+	compatible = "pic32cz_ca80,cult", "microchip,pic32cz8110ca80208", "microchip,pic32cz";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+
+	aliases {
+		led0 = &led0;
+		led1 = &led1;
+		sw0 = &button0;
+		sw1 = &button1;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0: led_0 {
+			gpios = <&portb 21 GPIO_ACTIVE_LOW>;
+			label = "User LED 0";
+		};
+
+		led1: led_1 {
+			gpios = <&portb 22 GPIO_ACTIVE_LOW>;
+			label = "User LED 1";
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+
+		button0: button_0 {
+			gpios = <&portb 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "SW0";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+
+		button1: button_1 {
+			gpios = <&portc 23 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "SW1";
+			zephyr,code = <INPUT_KEY_1>;
+		};
+	};
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		storage_partition: partition@7fc000 {
+			label = "storage";
+			reg = <0x0007fc000 0x4000>;
+		};
+	};
+};
+
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
+&portb {
+	status = "okay";
+};
+
+&portc {
+	status = "okay";
+};

boards/microchip/pic32c/pic32cz_ca80_cult/pic32cz_ca80_cult.yaml

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+# Copyright (c) 2025 Microchip Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+identifier: pic32cz_ca80_cult
+name: PIC32CZ CA80 Curiosity Ultra
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+flash: 8192
+ram: 1024
+supported:
+  - gpio
+vendor: microchip

boards/microchip/pic32c/pic32cz_ca80_cult/pic32cz_ca80_cult_defconfig

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+# Copyright (c) 2025 Microchip Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_BUILD_OUTPUT_HEX=y
+CONFIG_ARM_MPU=y

dts/arm/microchip/pic32c/pic32cz_ca/common/pic32cz_1051_ca.dtsi

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+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		flash0: flash@8000000 {
+			reg = <0x08000000 DT_SIZE_M(1)>;
+		};
+
+		sram0: memory@20000000 {
+			reg = <0x20000000 DT_SIZE_K(512)>;
+		};
+	};
+};

dts/arm/microchip/pic32c/pic32cz_ca/common/pic32cz_2051_ca.dtsi

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+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		flash0: flash@8000000 {
+			reg = <0x08000000 DT_SIZE_M(2)>;
+		};
+
+		sram0: memory@20000000 {
+			reg = <0x20000000 DT_SIZE_K(512)>;
+		};
+	};
+};

dts/arm/microchip/pic32c/pic32cz_ca/common/pic32cz_4010_ca.dtsi

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+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		flash0: flash@8000000 {
+			reg = <0x08000000 DT_SIZE_M(4)>;
+		};
+
+		sram0: memory@20000000 {
+			reg = <0x20000000 DT_SIZE_M(1)>;
+		};
+	};
+};

dts/arm/microchip/pic32c/pic32cz_ca/common/pic32cz_8110_ca.dtsi

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+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		flash0: flash@8000000 {
+			reg = <0x08000000 DT_SIZE_M(8)>;
+		};
+
+		sram0: memory@20000000 {
+			reg = <0x20000000 DT_SIZE_M(1)>;
+		};
+	};
+};

dts/arm/microchip/pic32c/pic32cz_ca/common/pic32cz_ca.dtsi

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+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arm/armv7-m.dtsi>
+#include <zephyr/dt-bindings/gpio/gpio.h>
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-m7";
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			mpu: mpu@e000ed90 {
+				compatible = "arm,armv7m-mpu";
+				reg = <0xe000ed90 0x40>;
+			};
+		};
+	};
+
+	soc {
+		flash0: flash@8000000 {
+			compatible = "soc-nv-flash";
+			write-block-size = <8>;
+		};
+
+		sram0: memory@20000000 {
+			compatible = "mmio-sram";
+		};
+
+		porta: gpio@44840000 {
+			status = "disabled";
+			compatible = "microchip,port-g1-gpio";
+			reg = <0x44840000 0x80>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			#microchip,pin-cells = <2>;
+		};
+
+		portb: gpio@44840080 {
+			status = "disabled";
+			compatible = "microchip,port-g1-gpio";
+			reg = <0x44840080 0x80>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			#microchip,pin-cells = <2>;
+		};
+
+		portc: gpio@44840100 {
+			status = "disabled";
+			compatible = "microchip,port-g1-gpio";
+			reg = <0x44840100 0x80>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			#microchip,pin-cells = <2>;
+		};
+
+		portd: gpio@44840180 {
+			status = "disabled";
+			compatible = "microchip,port-g1-gpio";
+			reg = <0x44840180 0x80>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			#microchip,pin-cells = <2>;
+		};
+	};
+};
+
+&nvic {
+	arm,num-irq-priority-bits = <3>;
+};

dts/arm/microchip/pic32c/pic32cz_ca/common/pic32cz_ca_100.dtsi

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+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <microchip/pic32c/pic32cz_ca/common/pic32cz_ca.dtsi>

dts/arm/microchip/pic32c/pic32cz_ca/common/pic32cz_ca_144.dtsi

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+/*
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <microchip/pic32c/pic32cz_ca/common/pic32cz_ca.dtsi>