Add soc em32f967

boards/elan/32f967_dv/32f967_dv.dts

@@ -0,0 +1,173 @@
+/*
+ * Copyright (c) 2024 ELAN Microelectronics Corp.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <arm/armv7-m.dtsi>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+#include <elan/em32fxxx.dtsi>
+#include <elan/em32f967-pinctrl.dtsi>
+
+/ {
+    model = "ELAN EM32F967 Development Board";
+    compatible = "elan,em32f967_dv";
+
+    chosen {
+        zephyr,console = &uart0;
+        zephyr,shell-uart = &uart0;
+        zephyr,sram = &sram0;
+        zephyr,flash-controller = &em32_flash_controller;
+        zephyr,flash = &flash0;
+        zephyr,spi2 = &spi2;
+        zephyr,udc0 = &usbd;
+	zephyr,entropy = &trng0;
+    };
+
+    leds {
+        compatible = "gpio-leds";
+
+        led0: led_0 {
+            gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
+            label = "User LED 0 (PB14)";
+        };
+
+        led1: led_1 {
+            gpios = <&gpiob 15 GPIO_ACTIVE_HIGH>;
+            label = "User LED 1 (PB15)";
+        };
+    };
+
+    buttons {
+        compatible = "gpio-keys";
+
+        button0: button_0 {
+            gpios = <&gpioa 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+            label = "User Button 0 (PA6)";
+        };
+
+        button1: button_1 {
+            gpios = <&gpiob 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+            label = "User Button 1 (PB11)";
+        };
+    };
+
+    aliases {
+        led0 = &led0;
+        led1 = &led1;
+        sw0 = &button0;
+        sw1 = &button1;
+        spi2 = &spi2;
+	watchdog0 = &wdt0;
+    };
+};
+
+&clk_ahb {
+    status = "okay";
+};
+
+&clk_apb {
+    clocks = <&clk_ahb>;
+    status = "okay";
+};
+
+&sram0 {
+    reg = <0x20000000 0x28000>;
+};
+
+#if 0
+&uart1 {
+    pinctrl-0 = <&uart1_rx_pa1 &uart1_tx_pa2>;
+    pinctrl-names = "default";
+    current-speed = <115200>;
+    status = "okay";
+};
+
+&spi1 {
+    status = "okay";
+    pinctrl-0 = <&spi1_cs_pb0 &spi1_sck_pb1 &spi1_miso_pb2 &spi1_mosi_pb3>;
+    pinctrl-names = "default";
+    cs-gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
+};
+
+#endif
+
+&spi2 {
+	status = "okay";
+	pinctrl-0 = <&spi2_sck_pb5 &spi2_miso_pb6 &spi2_mosi_pb7>;
+	pinctrl-names = "default";
+	cs-gpios = <&gpiob 4 GPIO_ACTIVE_LOW>;
+};
+
+&uart0 {
+    status = "okay";
+    current-speed = <115200>;
+    pinctrl-0 = <&uart1_rx_pa1 &uart1_tx_pa2>;
+    pinctrl-names = "default";
+};
+
+&em32_flash_controller {
+    status = "okay";
+};
+
+&flash0 {
+    partitions {
+        compatible = "fixed-partitions";
+
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        wp_ro: partition@0 {
+            label = "wp-ro";
+            reg = <0x0 DT_SIZE_K(128)>;
+            read-only;
+        };
+
+        rollback_0: partition@10020000 {
+            label = "rollback-0";
+            reg = <0x10020000 DT_SIZE_K(8)>;
+        };
+
+        rollback_1: partition@10022000 {
+            label = "rollback-1";
+            reg = <0x10022000 DT_SIZE_K(8)>;
+        };
+
+        ec_rw: partition@10024000 {
+            label = "ec-rw";
+            reg = <0x10024000 DT_SIZE_K(392)>;
+        };   
+    };
+};
+
+&gpioa {
+    	status = "okay";
+};
+
+&gpiob {
+    	status = "okay";
+};
+
+zephyr_udc0: &usbd {
+    status = "okay";
+};
+
+&uid {
+    	status = "okay";
+};
+
+&bbram0 {
+    status = "okay";
+};
+
+&trng0 {
+    status = "okay";
+};
+
+&wdt0 {
+    status = "okay";
+};
+
+&crypto0 {
+    status = "okay";
+};

boards/elan/32f967_dv/32f967_dv.yaml

@@ -0,0 +1,11 @@
+identifier: 32f967_dv
+name: ELAN EM32F967 dv Board
+vendor: elan
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+supported:
+  - serial
+ram: 272
+flash: 592

boards/elan/32f967_dv/32f967_dv_defconfig

@@ -0,0 +1,16 @@
+CONFIG_PINCTRL=y
+CONFIG_FLASH=y
+CONFIG_FLASH_EM32=y
+CONFIG_GPIO=y
+CONFIG_SPI=y
+CONFIG_SERIAL=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_UART_ELAN_ELANDEV=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
+CONFIG_SOC_PREP_HOOK=y
+CONFIG_CLOCK_CONTROL=y
+CONFIG_CLOCK_CONTROL_EM32_AHB=y
+CONFIG_CLOCK_CONTROL_EM32_APB=y
+CONFIG_UDC_DRIVER=y
+CONFIG_DYNAMIC_INTERRUPTS=y

boards/elan/32f967_dv/Kconfig

@@ -0,0 +1,27 @@
+menu "Zephyr"
+
+config MAIN_STACK_SIZE
+	int "MAIN_STACK_SIZE"
+	default 4096
+
+config ISR_STACK_SIZE
+	int "ISR_STACK_SIZE"
+	default 4096
+
+config IDLE_STACK_SIZE
+	int "IDLE_STACK_SIZE"
+	default 1024
+
+config UART_USE_RUNTIME_CONFIGURE
+	bool	"UART_USE_RUNTIME_CONFIGURE"
+	default n
+
+config UART_INTERRUPT_DRIVEN
+	bool	"UART_INTERRUPT_DRIVEN"
+	default n
+
+config UART_ASYNC_API
+	bool	"UART_ASYNC_API"
+	default n
+
+endmenu

boards/elan/32f967_dv/Kconfig.32f967_dv

@@ -0,0 +1,6 @@
+# Copyright (c) 2019-2024 Intel Corporation
+#
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_32F967_DV
+	select SOC_EM32F967

boards/elan/32f967_dv/board.cmake

@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: Apache-2.0
+
+board_set_flasher_ifnset(misc-flasher)
+board_finalize_runner_args(misc-flasher)

boards/elan/32f967_dv/board.yml

@@ -0,0 +1,6 @@
+board:
+  name: 32f967_dv
+  full_name: ELAN EM32F967
+  vendor: ELAN
+  socs:
+   - name: em32f967