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arch: riscv: use riscv Kconfigs to set 64BIT and CPU_HAS_FPU #97981

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arch: riscv: use riscv Kconfigs to set 64BIT and CPU_HAS_FPU #97981

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dfe203f
arch: riscv: use RISCV_ISA_RV64I to set 64BIT
maass-hamburg Oct 21, 2025
e2870d0
arch: riscv: use RISCV_ISA_EXT_F to set CPU_HAS_FPU
maass-hamburg Oct 21, 2025
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4 changes: 3 additions & 1 deletion arch/riscv/Kconfig.isa
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Expand Up @@ -13,7 +13,7 @@ config RISCV_ISA_RV32E

config RISCV_ISA_RV64I
bool
default y if 64BIT
select 64BIT
help
RV64I Base Integer Instruction Set - 64bit

Expand Down Expand Up @@ -45,6 +45,7 @@ config RISCV_ISA_EXT_A

config RISCV_ISA_EXT_F
bool
select CPU_HAS_FPU
help
(F) - Standard Extension for Single-Precision Floating-Point

Expand All @@ -56,6 +57,7 @@ config RISCV_ISA_EXT_F
config RISCV_ISA_EXT_D
bool
depends on RISCV_ISA_EXT_F
select CPU_HAS_FPU_DOUBLE_PRECISION
help
(D) - Standard Extension for Double-Precision Floating-Point

Expand Down
6 changes: 3 additions & 3 deletions soc/andestech/ae350/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,6 @@ config RV32E_CPU
config RV64I_CPU
bool "RISCV64 CPU ISA"
select RISCV_ISA_RV64I
select 64BIT

endchoice

Expand All @@ -62,11 +61,12 @@ config NO_FPU

config SINGLE_PRECISION_FPU
bool "Single precision FPU"
select CPU_HAS_FPU
select RISCV_ISA_EXT_F

config DOUBLE_PRECISION_FPU
bool "Double precision FPU"
select CPU_HAS_FPU_DOUBLE_PRECISION
select RISCV_ISA_EXT_F
select RISCV_ISA_EXT_D

endchoice

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1 change: 0 additions & 1 deletion soc/bflb/bl60x/Kconfig
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Expand Up @@ -8,7 +8,6 @@ config SOC_SERIES_BL60X
select CACHE_MANAGEMENT
select CLOCK_CONTROL
select CODE_DATA_RELOCATION
select CPU_HAS_FPU
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select FLOAT_HARD
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1 change: 0 additions & 1 deletion soc/bflb/bl61x/Kconfig
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Expand Up @@ -5,7 +5,6 @@
config SOC_SERIES_BL61X
select CLOCK_CONTROL
select CODE_DATA_RELOCATION
select CPU_HAS_FPU
select DCACHE
select FLOAT_HARD
select FPU
Expand Down
1 change: 0 additions & 1 deletion soc/bflb/bl70x/Kconfig
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Expand Up @@ -7,7 +7,6 @@ config SOC_SERIES_BL70X
select CACHE_MANAGEMENT
select CLOCK_CONTROL
select CODE_DATA_RELOCATION
select CPU_HAS_FPU
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select FLOAT_HARD
Expand Down
2 changes: 1 addition & 1 deletion soc/egis/et171/Kconfig
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Expand Up @@ -11,9 +11,9 @@ config SOC_EGIS_ET171
select RISCV_ISA_EXT_M
select RISCV_ISA_EXT_A
select RISCV_ISA_EXT_C
select RISCV_ISA_EXT_F
select RISCV_ISA_EXT_ZICSR
select RISCV_ISA_EXT_ZIFENCEI
select CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
select CPU_HAS_ANDES_EXECIT
Expand Down
2 changes: 1 addition & 1 deletion soc/ite/ec/it8xxx2/Kconfig
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Expand Up @@ -2,7 +2,7 @@
# SPDX-License-Identifier: Apache-2.0

config SOC_SERIES_IT8XXX2
select CPU_HAS_FPU if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "zephyr" || RISCV_ISA_EXT_M
select RISCV_ISA_EXT_F if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "zephyr" || RISCV_ISA_EXT_M
select HAS_PM
select ARCH_HAS_CUSTOM_CPU_IDLE
select ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
Expand Down
2 changes: 1 addition & 1 deletion soc/qemu/virt_riscv/qemu_virt_riscv32/Kconfig
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Expand Up @@ -2,8 +2,8 @@
# SPDX-License-Identifier: Apache-2.0

config SOC_QEMU_VIRT_RISCV32
select CPU_HAS_FPU
select RISCV_ISA_RV32I
select RISCV_ISA_EXT_F
select RISCV_ISA_EXT_ZICSR
select RISCV_ISA_EXT_ZIFENCEI
select RISCV_HAS_PLIC
4 changes: 2 additions & 2 deletions soc/qemu/virt_riscv/qemu_virt_riscv64/Kconfig
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Expand Up @@ -2,9 +2,9 @@
# SPDX-License-Identifier: Apache-2.0

config SOC_QEMU_VIRT_RISCV64
select 64BIT
select CPU_HAS_FPU_DOUBLE_PRECISION
select RISCV_ISA_RV64I
select RISCV_ISA_EXT_F
select RISCV_ISA_EXT_D
select RISCV_ISA_EXT_ZICSR
select RISCV_ISA_EXT_ZIFENCEI
select RISCV_HAS_PLIC
3 changes: 0 additions & 3 deletions soc/sifive/sifive_freedom/fu500/Kconfig
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Expand Up @@ -5,8 +5,6 @@
config SOC_SERIES_SIFIVE_FREEDOM_FU500
bool

select 64BIT

# RISC-V options
select RISCV
select RISCV_PRIVILEGED
Expand All @@ -28,4 +26,3 @@ config SOC_SERIES_SIFIVE_FREEDOM_FU500
config SOC_SIFIVE_FREEDOM_FU540_U54
bool
select RISCV_ISA_EXT_G
select CPU_HAS_FPU_DOUBLE_PRECISION
3 changes: 0 additions & 3 deletions soc/sifive/sifive_freedom/fu700/Kconfig
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Expand Up @@ -4,8 +4,6 @@
config SOC_SERIES_SIFIVE_FREEDOM_FU700
bool

select 64BIT

# RISC-V options
select RISCV
select RISCV_PRIVILEGED
Expand All @@ -27,4 +25,3 @@ config SOC_SERIES_SIFIVE_FREEDOM_FU700
config SOC_SIFIVE_FREEDOM_FU740_U74
bool
select RISCV_ISA_EXT_G
select CPU_HAS_FPU_DOUBLE_PRECISION
1 change: 0 additions & 1 deletion soc/starfive/jh71xx/Kconfig
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Expand Up @@ -25,4 +25,3 @@ config SOC_JH7110
select RISCV_ISA_EXT_C
select RISCV_ISA_EXT_ZICSR
select RISCV_ISA_EXT_ZIFENCEI
select 64BIT
2 changes: 1 addition & 1 deletion soc/telink/tlsr/tlsr951x/Kconfig
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Expand Up @@ -8,13 +8,13 @@ config SOC_SERIES_TLSR951X
select RISCV_ISA_EXT_M
select RISCV_ISA_EXT_A
select RISCV_ISA_EXT_C
select RISCV_ISA_EXT_F
select RISCV_ISA_EXT_ZICSR
select RISCV_ISA_EXT_ZIFENCEI
select RISCV_PRIVILEGED
select RISCV_HAS_PLIC
select RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING
select HAS_TELINK_DRIVERS
select CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
select CPU_HAS_ANDES_HWDSP
Expand Down