stm32h745i_disco/stm32h750b_dk: fix instabilites in SDRAM access and full SDRAM access test #99824
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WARNING: commit picked from P-R 99799. To be preferably reviewed from
that P-R.
According to UM2488 section 6.12[1], the available SDRAM size is only 8MB
by hardware design, though 128Bit SDRAM is connected.
Link: https://www.st.com/resource/en/user_manual/um2488-discovery-kits-with-stm32h745xi-and-stm32h750xb-mcus-stmicroelectronics.pdf [1]
Signed-off-by: Jisheng Zhang <[email protected]>
WARNING: commit picked from P-R 99799. To be preferably reviewed from
that P-R.
According to UM2488 section 6.12[1], the available SDRAM size is only 8MB
by hardware design, though 128Bit SDRAM is connected.
Link: https://www.st.com/resource/en/user_manual/um2488-discovery-kits-with-stm32h745xi-and-stm32h750xb-mcus-stmicroelectronics.pdf [1]
Signed-off-by: Jisheng Zhang <[email protected]>
Correct memc driver test application to allocated only the required size for the tests and print valid information instead of byte offset that was actually a 32bit cell pointer offset. Signed-off-by: Etienne Carriere <[email protected]>
Testing full SDRAM access on stm32h745i_disco showed instabilities and corrupted accessed. Increasing the FMC SDRAM clock period fixes the issue. This change ensures stability of transactions with the SDRAM but may be sub-optimized regarding performances. An alternate correction would need further investigations in the FMC interface timings and clocks configuration. Signed-off-by: Etienne Carriere <[email protected]>
Testing full SDRAM access on stm32h750b_disco showed instabilities and corrupted accessed. Increasing the FMC SDRAM clock period fixes the issue. This change ensures stability of transactions with the SDRAM but may be sub-optimized regarding performances. An alternate correction would need further investigations in the FMC interface timings and clocks configuration. Signed-off-by: Etienne Carriere <[email protected]>
Add an overlay for some STM32 boards that embed an SDRAM connected through FMC interface to better cover their accessibility. Despite each SDRAM is a few MByte large test are not too long lasting: - stm32f769i_disco (16MByte): 2s - stm32h747i_disco (32MByte): <0.6s - stm32h745i_disco (8Mbyte): <0.2s - stm32h750b_dk (8Mbyte): <0.2s Adding these test ensures non-regression on SDRAM support. Signed-off-by: Etienne Carriere <[email protected]>
zephyrbot
added
area: MEMC
area: Boards/SoCs
platform: STM32
zephyrbot
requested review from
FRASTM,
GeorgeCGV,
djiatsaf-st,
erwango,
gautierg-st,
juickar,
mathieuchopstm and
nashif
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Propose a FMC/SDRAM interface configuration change since some instabilites were found when using tests/drivers/memc to test more access to these boards SDRAM than the 64 first bytes.
This P-R proposes to enable full SDRAM write/read accesses for these 2 boards and 2 others. Maybe overkilling, see the related proposed commit.
This change is based on 2 commits already under review in P-R #99799.