Single-bit std_logic to a slice (ghdl)

[davekeeshan]

peakrdl-regblock-vhdl used (0 => value) when assigning single-bit std_logic to a slice, instead of (low => value), causing “choice is out of index range” when low != 0

This appear in ghdl, may not appear in other simulators

Description of change

Fixes #27,

Checklist

• I have reviewed this project's contribution guidelines
• This change has been tested and does not break any of the existing unit tests. (if unable to run the tests, let us know)
• If this change adds new features, I have added new unit tests that cover them.