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1. 2-way-traffic_light 2-way-traffic_light Public

   This project involves designing a finite state machine (FSM) to control traffic lights at a two-way intersection. It uses a clock and reset as inputs and provides two 3-bit outputs, `light_A` and `…

   Verilog

2. RTL2GDS_vsdflow RTL2GDS_vsdflow Public

3. Optimized_4-Bit_VedicMultiplier Optimized_4-Bit_VedicMultiplier Public

   Verilog

4. layout_virtuoso layout_virtuoso Public

5. dig_lock_sys dig_lock_sys Public

   This project implements a simple digital lock system using a 4-bit password entered via switches. The input is compared to a preset value, turning an LED ON if matched, or keeping it OFF otherwise.…

   Verilog