Skip to content

vector: constrain index load/store for eew64 and xlen32 #2125

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 1 commit into
base: master
Choose a base branch
from
+1 −0
Open

vector: constrain index load/store for eew64 and xlen32 #2125

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
1 change: 1 addition & 0 deletions riscv/v_ext_macros.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -90,6 +90,7 @@ static inline bool is_overlapped_widen(const int astart, int asize,
#define VI_CHECK_ST_INDEX(elt_width) \
require_vector(false); \
require(elt_width <= P.VU.ELEN); \
require(elt_width <= P.get_xlen()); \
Copy link
Collaborator

@aswaterman aswaterman Nov 6, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Maybe require(elt_width <= std::min(P.VU.ELEN, P.get_xlen()));? But it is a matter of opinion.

float vemul = ((float)elt_width / P.VU.vsew * P.VU.vflmul); \
require(vemul >= 0.125 && vemul <= 8); \
reg_t UNUSED emul = vemul < 1 ? 1 : vemul; \
Expand Down
Loading