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@fsammoura1980 fsammoura1980 commented Oct 7, 2025

Introduce new macros to define bitfields for RISC-V Physical Memory Protection (PMP) attributes, specifically for specifying Read, Write, and Execute permissions for IO memory regions in device tree bindings.

The following macros are added:

  • ATTR_RISCV_TYPE_IO_R: Read access
  • ATTR_RISCV_TYPE_IO_W: Write access
  • ATTR_RISCV_TYPE_IO_X: Execute access

Corresponding macros for device tree usage are also added:

  • DT_MEM_RISCV_TYPE_IO_R
  • DT_MEM_RISCV_TYPE_IO_W
  • DT_MEM_RISCV_TYPE_IO_X

These macros allow device tree source files to precisely describe the intended access permissions for memory-mapped IO regions, enhancing the system's memory protection configuration.

dcpleung
dcpleung previously approved these changes Oct 7, 2025
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@jimmyzhe jimmyzhe left a comment

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I think this change should be a part of #96241, decode these bitfields and translate them into PMP configuration.

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sonarqubecloud bot commented Oct 9, 2025

Introduce new macros to define bitfields for RISC-V Physical Memory
Protection (PMP) attributes, specifically for specifying Read, Write,
and Execute permissions for IO memory regions in device tree bindings.

The following macros are added:
- ATTR_RISCV_TYPE_IO_R: Read access
- ATTR_RISCV_TYPE_IO_W: Write access
- ATTR_RISCV_TYPE_IO_X: Execute access

Corresponding macros for device tree usage are also added:
- DT_MEM_RISCV_TYPE_IO_R
- DT_MEM_RISCV_TYPE_IO_W
- DT_MEM_RISCV_TYPE_IO_X

These macros allow device tree source files to precisely describe the
intended access permissions for memory-mapped IO regions, enhancing
the system's memory protection configuration.

Signed-off-by: Firas Sammoura <[email protected]>
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Useful for #96241, PMP region declarations via zephyr,memory-attr. Thanks.

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@fkokosinski fkokosinski left a comment

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LGTM

@jhedberg jhedberg merged commit 6a62950 into zephyrproject-rtos:main Oct 9, 2025
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6 participants