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add sdhc support on i.MX 91 FRDM board #97509

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7378a17
west.yml: update hal_nxp revision
JiafeiPan Oct 14, 2025
1e9113a
dts: arm64: imx9131: add USDHC device nodes
nxp-xl Jul 8, 2025
50676b7
soc: imx91: add empty soc.h
nxp-xl Jul 8, 2025
057735f
boards: frdm_imx91: enable SDHC on the board
nxp-xl Jul 8, 2025
05c3f5b
samples: fs: fs_sample: Increase CONFIG_MAIN_STACK_SIZE for imx91
nxp-xl Dec 27, 2024
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9 changes: 9 additions & 0 deletions boards/nxp/frdm_imx91/Kconfig.defconfig
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# Copyright 2025 NXP
# SPDX-License-Identifier: Apache-2.0

if BOARD_FRDM_IMX91

config GPIO
default y if IMX_USDHC

endif # BOARD_FRDM_IMX93
31 changes: 31 additions & 0 deletions boards/nxp/frdm_imx91/doc/index.rst
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Expand Up @@ -70,6 +70,37 @@ Serial Port
This board configuration uses a single serial communication channel with the
CPU's UART1 for A55 core.

uSDHC (SD or eMMC Interface on A55)
-----------------------------------

i.MX 91 processor has three ultra secured digital host controller (uSDHC) modules
for SD/eMMC interface support. On the FRDM-IMX91 board, the uSDHC2 interface of
the processor connects to the MicroSD card slot (P13), and uSDHC1 interface connects
to the eMMC memory (located at the SOM board). DTS overlay file "usdhc1.overlay" and
"usdhc2.overlay" are provided to enable specified the uSDHC controller.

Currently it rely on U-boot or Linux to boot Zephyr, so Zephyr need to use different
uSDHC controller from U-boot or Linux to avoid resource conflict. For example, if
FRDM-IMX91 board boots from SD Card which uses uSDHC2, Zephyr can use MMC
which uses uSDHC1 for testing:

.. zephyr-app-commands::
:zephyr-app: tests/subsys/sd/mmc
:host-os: unix
:board: frdm_imx91/mimx9131
:goals: build
:gen-args: -DEXTRA_DTC_OVERLAY_FILE=usdhc1.overlay

And if FRDM-IMX91 board boots from MMC which uses uSDHC1, Zephyr can use SD Card which uses
uSDHC2 for testing:

.. zephyr-app-commands::
:zephyr-app: tests/subsys/sd/sdmmc
:host-os: unix
:board: frdm_imx91/mimx9131
:goals: build
:gen-args: -DEXTRA_DTC_OVERLAY_FILE=usdhc2.overlay

Programming and Debugging
*************************

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18 changes: 18 additions & 0 deletions boards/nxp/frdm_imx91/dts/usdhc1.overlay
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/*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
aliases {
sdhc0 = &usdhc1;
};
};

&usdhc1 {
status = "okay";
sdmmc {
status = "okay";
};
};
18 changes: 18 additions & 0 deletions boards/nxp/frdm_imx91/dts/usdhc2.overlay
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/*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
aliases {
sdhc0 = &usdhc2;
};
};

&usdhc2 {
status = "okay";
sdmmc {
status = "okay";
};
};
195 changes: 195 additions & 0 deletions boards/nxp/frdm_imx91/frdm_imx91-pinctrl.dtsi
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Expand Up @@ -26,4 +26,199 @@
drive-strength = "x5";
};
};

pinmux_usdhc1: pinmux_usdhc1 {
group0 {
pinmux = <&iomuxc1_sd1_clk_usdhc_clk_usdhc1_clk>,
<&iomuxc1_sd1_strobe_usdhc_strobe_usdhc1_strobe>;
drive-strength = "x1";
bias-pull-down;
slew-rate = "fast";
input-schmitt-enable;
};

group1 {
pinmux = <&iomuxc1_sd1_cmd_usdhc_cmd_usdhc1_cmd>,
<&iomuxc1_sd1_data0_usdhc_data_usdhc1_data0>,
<&iomuxc1_sd1_data1_usdhc_data_usdhc1_data1>,
<&iomuxc1_sd1_data2_usdhc_data_usdhc1_data2>,
<&iomuxc1_sd1_data3_usdhc_data_usdhc1_data3>,
<&iomuxc1_sd1_data4_usdhc_data_usdhc1_data4>,
<&iomuxc1_sd1_data5_usdhc_data_usdhc1_data5>,
<&iomuxc1_sd1_data6_usdhc_data_usdhc1_data6>,
<&iomuxc1_sd1_data7_usdhc_data_usdhc1_data7>;
drive-strength = "x1";
slew-rate = "fast";
input-schmitt-enable;
bias-pull-up;
input-enable;
};
};

pinmux_usdhc1_100mhz: pinmux_usdhc1_100mhz {
group0 {
pinmux = <&iomuxc1_sd1_clk_usdhc_clk_usdhc1_clk>,
<&iomuxc1_sd1_strobe_usdhc_strobe_usdhc1_strobe>;
drive-strength = "x3";
bias-pull-down;
slew-rate = "fast";
input-schmitt-enable;
};

group1 {
pinmux = <&iomuxc1_sd1_cmd_usdhc_cmd_usdhc1_cmd>,
<&iomuxc1_sd1_data0_usdhc_data_usdhc1_data0>,
<&iomuxc1_sd1_data1_usdhc_data_usdhc1_data1>,
<&iomuxc1_sd1_data2_usdhc_data_usdhc1_data2>,
<&iomuxc1_sd1_data3_usdhc_data_usdhc1_data3>,
<&iomuxc1_sd1_data4_usdhc_data_usdhc1_data4>,
<&iomuxc1_sd1_data5_usdhc_data_usdhc1_data5>,
<&iomuxc1_sd1_data6_usdhc_data_usdhc1_data6>,
<&iomuxc1_sd1_data7_usdhc_data_usdhc1_data7>;
drive-strength = "x3";
slew-rate = "fast";
input-schmitt-enable;
bias-pull-up;
input-enable;
};
};

pinmux_usdhc1_200mhz: pinmux_usdhc1_200mhz {
group0 {
pinmux = <&iomuxc1_sd1_clk_usdhc_clk_usdhc1_clk>,
<&iomuxc1_sd1_strobe_usdhc_strobe_usdhc1_strobe>;
drive-strength = "x6";
bias-pull-down;
slew-rate = "fast";
input-schmitt-enable;
};

group1 {
pinmux = <&iomuxc1_sd1_cmd_usdhc_cmd_usdhc1_cmd>,
<&iomuxc1_sd1_data0_usdhc_data_usdhc1_data0>,
<&iomuxc1_sd1_data1_usdhc_data_usdhc1_data1>,
<&iomuxc1_sd1_data2_usdhc_data_usdhc1_data2>,
<&iomuxc1_sd1_data3_usdhc_data_usdhc1_data3>,
<&iomuxc1_sd1_data4_usdhc_data_usdhc1_data4>,
<&iomuxc1_sd1_data5_usdhc_data_usdhc1_data5>,
<&iomuxc1_sd1_data6_usdhc_data_usdhc1_data6>,
<&iomuxc1_sd1_data7_usdhc_data_usdhc1_data7>;
drive-strength = "x6";
slew-rate = "fast";
input-schmitt-enable;
bias-pull-up;
input-enable;
};
};

pinmux_usdhc2: pinmux_usdhc2 {
group0 {
pinmux = <&iomuxc1_sd2_clk_usdhc_clk_usdhc2_clk>;
drive-strength = "x1";
bias-pull-down;
slew-rate = "fast";
input-schmitt-enable;
};

group1 {
pinmux = <&iomuxc1_sd2_cmd_usdhc_cmd_usdhc2_cmd>,
<&iomuxc1_sd2_data0_usdhc_data_usdhc2_data0>,
<&iomuxc1_sd2_data1_usdhc_data_usdhc2_data1>,
<&iomuxc1_sd2_data2_usdhc_data_usdhc2_data2>,
<&iomuxc1_sd2_data3_usdhc_data_usdhc2_data3>;
drive-strength = "x1";
slew-rate = "fast";
input-schmitt-enable;
bias-pull-up;
input-enable;
};

group2 {
pinmux = <&iomuxc1_sd2_vselect_usdhc_vselect_usdhc2_vselect>;
drive-strength = "x4";
slew-rate = "slightly_fast";
};

group3 {
pinmux = <&iomuxc1_sd2_cd_b_gpio_io_gpio3_io0>,
<&iomuxc1_sd2_reset_b_gpio_io_gpio3_io7>;
drive-strength = "x4";
slew-rate = "slightly_fast";
bias-pull-up;
};
};

pinmux_usdhc2_100mhz: pinmux_usdhc2_100mhz {
group0 {
pinmux = <&iomuxc1_sd2_clk_usdhc_clk_usdhc2_clk>;
drive-strength = "x3";
bias-pull-down;
slew-rate = "fast";
input-schmitt-enable;
};

group1 {
pinmux = <&iomuxc1_sd2_cmd_usdhc_cmd_usdhc2_cmd>,
<&iomuxc1_sd2_data0_usdhc_data_usdhc2_data0>,
<&iomuxc1_sd2_data1_usdhc_data_usdhc2_data1>,
<&iomuxc1_sd2_data2_usdhc_data_usdhc2_data2>,
<&iomuxc1_sd2_data3_usdhc_data_usdhc2_data3>;
drive-strength = "x3";
slew-rate = "fast";
input-schmitt-enable;
bias-pull-up;
input-enable;
};

group2 {
pinmux = <&iomuxc1_sd2_vselect_usdhc_vselect_usdhc2_vselect>;
drive-strength = "x4";
slew-rate = "slightly_fast";
};

group3 {
pinmux = <&iomuxc1_sd2_cd_b_gpio_io_gpio3_io0>,
<&iomuxc1_sd2_reset_b_gpio_io_gpio3_io7>;
drive-strength = "x4";
slew-rate = "slightly_fast";
bias-pull-up;
};
};

pinmux_usdhc2_200mhz: pinmux_usdhc2_200mhz {
group0 {
pinmux = <&iomuxc1_sd2_clk_usdhc_clk_usdhc2_clk>;
drive-strength = "x6";
bias-pull-down;
slew-rate = "fast";
input-schmitt-enable;
};

group1 {
pinmux = <&iomuxc1_sd2_cmd_usdhc_cmd_usdhc2_cmd>,
<&iomuxc1_sd2_data0_usdhc_data_usdhc2_data0>,
<&iomuxc1_sd2_data1_usdhc_data_usdhc2_data1>,
<&iomuxc1_sd2_data2_usdhc_data_usdhc2_data2>,
<&iomuxc1_sd2_data3_usdhc_data_usdhc2_data3>;
drive-strength = "x6";
slew-rate = "fast";
input-schmitt-enable;
bias-pull-up;
input-enable;
};

group2 {
pinmux = <&iomuxc1_sd2_vselect_usdhc_vselect_usdhc2_vselect>;
drive-strength = "x4";
slew-rate = "slightly_fast";
};

group3 {
pinmux = <&iomuxc1_sd2_cd_b_gpio_io_gpio3_io0>,
<&iomuxc1_sd2_reset_b_gpio_io_gpio3_io7>;
drive-strength = "x4";
slew-rate = "slightly_fast";
bias-pull-up;
};
};
};
41 changes: 41 additions & 0 deletions boards/nxp/frdm_imx91/frdm_imx91_mimx9131.dts
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Expand Up @@ -25,6 +25,10 @@

};

&gpio3{
status = "okay";
};

&lpuart1 {
status = "okay";
current-speed = <115200>;
Expand All @@ -35,3 +39,40 @@
&tpm2 {
status = "okay";
};

&usdhc1 {
pinctrl-0 = <&pinmux_usdhc1>;
pinctrl-1 = <&pinmux_usdhc1_100mhz>;
pinctrl-2 = <&pinmux_usdhc1_200mhz>;
pinctrl-names = "default", "med", "fast";
mmc-hs200-1_8v;
mmc-hs400-1_8v;
read-watermark = <0x10>;
write-watermark = <0x80>;
status = "disabled";
mmc {
compatible = "zephyr,mmc-disk";
disk-name = "SD2";
status = "disabled";
};
};

&usdhc2 {
pinctrl-0 = <&pinmux_usdhc2>;
pinctrl-1 = <&pinmux_usdhc2_100mhz>;
pinctrl-2 = <&pinmux_usdhc2_200mhz>;
pinctrl-names = "default", "med", "fast";
pwr-gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
power-delay-ms = <20>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
read-watermark = <0x10>;
write-watermark = <0x80>;
status = "disabled";
sdmmc {
compatible = "zephyr,sdmmc-disk";
disk-name = "SD";
status = "disabled";
};
};
26 changes: 26 additions & 0 deletions dts/arm64/nxp/nxp_mimx9131.dtsi
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Expand Up @@ -240,6 +240,32 @@
status = "disabled";
};

usdhc1: usdhc@42850000 {
compatible = "nxp,imx-usdhc";
reg = <0x42850000 0x10000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&gic>;
clocks = <&ccm IMX_CCM_USDHC1_CLK 0 0>;
max-current-330 = <1020>;
max-current-180 = <1020>;
max-bus-freq = <208000000>;
min-bus-freq = <400000>;
status = "disabled";
};

usdhc2: usdhc@42860000 {
compatible = "nxp,imx-usdhc";
reg = <0x42860000 0x10000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&gic>;
clocks = <&ccm IMX_CCM_USDHC2_CLK 0 0>;
max-current-330 = <1020>;
max-current-180 = <1020>;
max-bus-freq = <208000000>;
min-bus-freq = <400000>;
status = "disabled";
};

tpm1: tpm@44310000 {
compatible = "nxp,tpm-timer";
reg = <0x44310000 DT_SIZE_K(64)>;
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1 change: 1 addition & 0 deletions samples/subsys/fs/fs_sample/boards/frdm_imx91_mimx9131.conf
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CONFIG_MAIN_STACK_SIZE=8192
16 changes: 16 additions & 0 deletions soc/nxp/imx/imx9/imx91/soc.h
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/*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/

#ifndef _SOC_NXP_IMX_IMX91_SOC_H_
#define _SOC_NXP_IMX_IMX91_SOC_H_

#ifndef _ASMLANGUAGE

#include <soc_common.h>

#endif /* !_ASMLANGUAGE */

#endif /* _SOC_NXP_IMX_IMX91_SOC_H_ */
2 changes: 1 addition & 1 deletion west.yml
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Expand Up @@ -210,7 +210,7 @@ manifest:
groups:
- hal
- name: hal_nxp
revision: 41d5acc2cff410440d42e3c1b563aaa166aa034b
revision: a8ad9f2faa5be6efb50e46bfcd697388a9caa65d
path: modules/hal/nxp
groups:
- hal
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