Chisel v7.9.0

Features

• Add parameter to ExtModule for requirements (by @trmckay in #5174)
• svsim: add Verilator coverage settings and reporting (by @MrAMS in #5200)

Fixes

• Bugfix: .toDefinition should update Builder.definitions (by @azidar in #5197)
• Fix memory corruption in svsim (by @fabianschuiki in #5203)
• Fix .toDefinition called on imported definition (by @azidar in #5206)

Dependency Updates

• [cd] Bump CIRCT from firtool-1.139.0 to firtool-1.140.0 (by @chiselbot in #5195)

Build and Internal Changes

• [main] Enable MiMa for v7.8.0 (by @chiselbot in #5194)
• [build] Use Mill 1.1.1-6-480a23 (by @jackkoenig in #5196)
• [build] Revert back to Mill 1.0.6 (by @jackkoenig in #5204)
• Bump webpack from 5.103.0 to 5.105.0 in /website (by @dependabot[bot] in #5201)

Full Changelog: v7.8.0...v7.9.0

Chisel v7.8.0

Features

• Add noModulePrefix (by @trmckay in #5147)
• Add chisel3.SimulationTestHarnessInterface and chisel3.SimulationTestHarness (by @trmckay in #5155)
• Add FlattenInstanceAllowDedup (by @jackkoenig in #5162)
• layer: add requireNotElideBlocksContext. (by @dtzSiFive in #5164)
• Add RunUntilFinished and RunUntilSuccess stimulus for SimulationTestHarnessInterface (by @trmckay in #5175)
• Add ChiselSim.simulateTest and SimulationTestStimulus (by @trmckay in #5176)
• Allow ChiselSim to link in prebuilt software libraries (by @fabianschuiki in #5189)
• Add ChiselSim Settings.defaultTest for SimulationTestHarnessInterface modules (by @trmckay in #5192)

Fixes

• [core] Add elideBlocks to Instantiate cache key (by @seldridge in #5150)
• [core] Propagate elideBlocks state in D/I (by @seldridge in #5152)
• Respect period parameter in InlineTestStimulus (by @trmckay in #5177)
• Fix timeout behavior of InlineTestStimulus (by @trmckay in #5180)

Build and Internal Changes

• [scala3] Implement SourceInfoMacro for Scala 3 (by @jackkoenig in #5139)
• [main] Enable MiMa for v7.7.0 (by @chiselbot in #5143)
• [Scala3] Add cross-compiling tests (by @adkian-sifive in #5141)
• [ci] Increase timeout for ChiselSim test to 60 seconds (by @jackkoenig in #5146)
• Enhance CI with separate buckets for Scala 2 and 3 (by @jackkoenig in #5145)
• Bump mikepenz/release-changelog-builder-action to v6.0.1 (by @jackkoenig in #5144)
• [scala3] Generate source locators for modules in compiler plugin (by @jackkoenig in #5149)
• [scala3] Bump to Scala 3.3.7 (by @jackkoenig in #5151)
• Prepare macros subproject for Scala 3 (by @jackkoenig in #5156)
• [scala3] Add initial support for publishing for Scala 3 (by @jackkoenig in #5157)
• [Scala3] Add Bundle parent field handling as in Scala 2 (by @adkian-sifive in #5154)
• [Scala3] Handle private Bundle parameters (by @adkian-sifive in #5153)
• [Scala3] Move AnalogIntegration, AsyncReset, Connect, Reset specs (by @adkian-sifive in #5165)
• Bump lodash from 4.17.21 to 4.17.23 in /website (by @dependabot[bot] in #5166)
• Add mill command to test modules marked as UnitTest (by @fabianschuiki in #5163)
• [Scala3] Bugfix: Add recursive checking for enclosing members (by @adkian-sifive in #5167)
• [Scala3] Move ValidSpec (by @adkian-sifive in #5169)
• [Scala3] Move DecoupledSpec (by @adkian-sifive in #5159)
• Limit unit tests to Chisel runpath; align closer with ScalaTest (by @fabianschuiki in #5171)
• Add simple module elaboration tracing to generate flamegraphs (by @fabianschuiki in #5168)
• [Scala3] Move AutoClonetypeSpec and 13 other tests (by @adkian-sifive in #5172)
• [Scala3] Move TypeAliasSpec and 11 other tests (by @adkian-sifive in #5173)
• [scala3] Start publishing SNAPSHOTs for Scala 3 (by @jackkoenig in #5178)
• Update mill bootstrap script (by @jackkoenig in #5181)
• [Scala3] Bugfix: Use correct printf.appy in PrintfIntf (by @adkian-sifive in #5183)
• [scala3] Add support for ScalaDoc (by @jackkoenig in #5184)
• [Scala3] Add Switch macro and move SwitchSpec (by @adkian-sifive in #5179)
• [Scala3] Bugfix: Correctly handle overriden values in BundlePhase field extraction (by @adkian-sifive in #5186)
• [Scala3] Implement ChiselEnum macro (by @adkian-sifive in #5182)
• [Scala3] Move ComplexAssign and 30 other tests (by @adkian-sifive in #5188)
• [scala3] Split LTL public API (by @jackkoenig in #5193)

Full Changelog: v7.7.0...v7.8.0

Chisel v7.7.0

Features

• Expose read-latency and write-latency parameters of FIRRTL memories (by @trmckay in #5133)

Fixes

• Use DedupGroup Phase in ChiselStage$ (by @seldridge in #4728)
• Add a workaround to verification directory path problem on Windows and firtool 1.138.0 (by @Siudya in #5134)
• [svsim] Fix deadlock in long simulations by flushing expectation queue (by @Emin017 in #5132)

Documentation

• Bump qs from 6.14.0 to 6.14.1 in /website (by @dependabot[bot] in #5136)

Dependency Updates

• [cd] Bump CIRCT from firtool-1.138.0 to firtool-1.139.0 (by @chiselbot in #5140)

Build and Internal Changes

• [main] Enable MiMa for v7.6.0 (by @chiselbot in #5131)

Full Changelog: v7.6.0...v7.7.0

Chisel v7.6.0

Features

• [core] Add associate method for Seq of ports (by @seldridge in #5122)
• Add runpath option to UnitTests main (by @fabianschuiki in #5125)

Backend Code Generation

• Fix name prefixing from views on rhs of connection (by @jackkoenig in #5117)
  Previously views when used on the LHS of a connection operator, views would provide the prefix view_. Now, at least for 1-1 views, the prefix is derived from the name of the target of the view. This is a common issue when using FlatIO.

Fixes

• Add source locators to more module kinds (by @seldridge in #5116)
• [svsim] Improve error message on illegal poke (by @seldridge in #5124)

Dependency Updates

• Update commons-text to 1.15.0 (by @scala-steward in #5119)

Build and Internal Changes

• [main] Enable MiMa for v7.5.0 (by @chiselbot in #5113)
• Update mdoc to 2.8.1 (by @scala-steward in #5120)
• [Scala3] Update BundlePhase to handle Bundles with type parameters (by @adkian-sifive in #5126)

Full Changelog: v7.5.0...v7.6.0

Chisel v7.5.0

API Deprecation

• Move ExtModule and Params out of experimental (by @seldridge in #5099)
• [core] Deprecate ExtModule, Params in experimental (by @seldridge in #5101)
• [core] Deprecate ExtModule utility traits (by @seldridge in #5102)
• [core] Deprecate BlackBox in favor of ExtModule (by @seldridge in #5103)

Fixes

• Support simple views in domain association (by @jackkoenig in #5106)
  Also give a useful error message for non-simple views.
• Fix boring taps of views of ExtModule ports (by @jackkoenig in #5110)
  This is a common issue when using FlatIO with ExtModules.
• Support absolute path source locators (by @jackkoenig in #5111)
  The default behavior of Scala-cli is to use a Bloop server running in the root directory for compilation. This results in absolute paths in for source locators at compile time, but our logic had assumed we always had relative paths and was manually stripping the leading forward slash in source locator paths. Instead, we strip the leading forward slash for relative paths by including it in the path prefix we remove, and then in error reporting we add support for paths that are already absolute.

Documentation

• Update mdoc to 2.7.2 (by @scala-steward in #5095)
• [website] npm update to fix security vulnerabilities (by @jackkoenig in #5105)

Dependency Updates

• Update json4s-native to 4.1.0 (by @scala-steward in #5094)
• Update commons-text to 1.14.0 (by @scala-steward in #5093)
• [cd] Bump CIRCT from firtool-1.137.0 to firtool-1.138.0 (by @chiselbot in #5108)

Build and Internal Changes

• [main] Enable MiMa for v7.4.0 (by @chiselbot in #5091)
• Remove all panama related stuff (by @jackkoenig in #5104)
  Remove all Panama-related code. Refresh lit-based tests and put them in CI.
• Simplify cross build (by @jackkoenig in #5098)
  You now run mill cross builds with just major version, e.g. mill chisel[2.13].compile and mill chisel[3].compile rather than mill chisel[2.13.18].compile and mill chisel[3.3.4].compile.

Full Changelog: v7.4.0...v7.5.0

Chisel v7.4.0

API Modification

• Make object Type in ClassType public (by @adkian-sifive in #5075)
  Update object Type in properties ClassType to be public
• Add SimulationTest marker (by @fabianschuiki in #4849)

Fixes

• [svsim] Use filelist for source files (by @seldridge in #5070)
• [svsim] Fix FSDB generation for VCS 2024+ (by @seldridge in #5071)

Documentation

• [chisel3.simulator.scalatest.Cli] fixing EmitVpd option description (by @nibrunieAtSi5 in #5072)

Dependency Updates

• [cd] Bump CIRCT from firtool-1.135.0 to firtool-1.136.0 (by @chiselbot in #5069)
• Bump to Scala 2.13.18 (by @jackkoenig in #5081)
• [cd] Bump CIRCT from firtool-1.136.0 to firtool-1.137.0 (by @chiselbot in #5090)

Build and Internal Changes

• [main] Enable MiMa for v7.3.0 (by @chiselbot in #5068)
• Add missing implies for BitsIntf (by @adkian-sifive in #5055)
  Add implies support to Scala 3 Bits
• Bump to mill 1.0.6 (by @jackkoenig in #5079)
• [Scala3] Add missing PrintfIntf implementation (by @adkian-sifive in #5086)
  Add missing Scala3 PrintfIntf implementation
• [Scala3] Support multiple parameter lists for Bundles (by @adkian-sifive in #5085)
  Support multiple parameter lists in Bundles
• [Scala3] Add support for Selectable Modules (by @adkian-sifive in #5087)
  Make Modules Selectable in Scala 3

Full Changelog: v7.3.0...v7.4.0

Chisel v7.3.0

Features

• [core] Add initial domain support (by @seldridge in #5041)
• [core] Add domain.unsafeCast method (by @seldridge in #5065)

Backend Code Generation

• Empty prefixes should be ignored in emission (by @jackkoenig in #5057)
  Previously they would result in an extra '_' in the same of the signal.

Fixes

• [svsim] Fix missing format specified (by @seldridge in 68f12f5)

Documentation

• [website] Update all website dependencies (by @jackkoenig in #5064)
• [ci] Update all github actions (by @jackkoenig in #5066)
  Caching has been broken for ages, this should fix that. It also updates all actions to Node 24 released versions if they exist yet. Everything must be moved to Node 25 by April [1].
• [website] Fix Snapshot API docs by hosting locally (by @jackkoenig in #5067)
  Previously, we linked to s01.sonatype which allowed rendering doc jars in the browser. As Sonatype has been sunset and Maven Central does not appear to support this, we will have to host the latest snapshot ourselves.

Dependency Updates

• [cd] Bump CIRCT from firtool-1.133.0 to firtool-1.134.0 (by @chiselbot in #5058)
• [cd] Bump CIRCT from firtool-1.134.0 to firtool-1.135.0 (by @chiselbot in #5063)

Build and Internal Changes

• [main] Enable MiMa for v7.2.0 (by @chiselbot in #5056)

Full Changelog: v7.2.0...v7.3.0

Chisel v7.2.0

Features

• [svsim] Add -j, --build-jobs, and --verilate-jobs (by @seldridge in #5051)
• ChiselEnum convenience functions; support string interaction (by @maartenboersma in #5036)
  Convenience functions to interact between ChiselEnum and String. Allows RTL readability improvements, especially if Enum values are not yet known at compile time (e.g. decode tables in separate files)
• Make BitPat accept ChiselEnum (by @maartenboersma in #5046)
  BitPat now accept ChiselEnum as an input.
• Add option to suppress emission of source locators (by @jackkoenig in #5053)
  Users can now pass --no-source-info to suppress emission of source locators in emitted .fir.

API Deprecation

• Add HasSerializationOverrides (by @jackkoenig in #5044)
  This is a deprecated API in firrtl.annotations that is similar to HasSerializationHints but allows for overriding the serialization class like OverrideSerializationClass does for Annotations themselves.
  Also remove the Annotation self typing on OverrideSerializationClass because it is pointless.

Fixes

• [svsim] Fix bugs in generated simulation code for Verilator backend. (by @xiaoh105 in #5054)
  Fix the run_simulation API in resource file simulation-driver.cpp for verilator backend to allow delayed events from BlackBox be scheduled by Verilator properly.

Dependency Updates

• [cd] Bump CIRCT from firtool-1.131.0 to firtool-1.132.0 (by @chiselbot in #5034)
• Bump to Scala 2.13.17 (by @jackkoenig in #5039)
  Note: Scala 2.13.17 has a new warning for inferred structural types as a Scala 3 compatibility issue. This warning applies to the common val io = IO(new Bundle { ... }) pattern in Chisel. It is not actually a problem because Chisel uses Programmatic Structural Types in Scala 3. You can suppress this warning in your build by adding-Wconf:msg=will no longer have a structural type:s to your scalacOptions. See configurable warnings for more details on -Wconf.
• [cd] Bump CIRCT from firtool-1.132.0 to firtool-1.133.0 (by @chiselbot in #5045)

Build and Internal Changes

• [main] Enable MiMa for v7.1.1 (by @chiselbot in #5035)
• [Scala3] Move CIRCT LTL from src/main/scala-2 to src/main/scala/ (by @adkian-sifive in #5047)
• [Scala3] BundlePhase updates (by @adkian-sifive in #5043)
  BundlePhase now runs after PickleQuotes to sidestep Scala 3 compiler bug scala/scala3#23793
• [Scala3] Rewrite svsim Verilator backend argument stringification (by @adkian-sifive in #5042)
  Svsim Verilator Backend argument generation was refactored to work with Scala 3
• [Scala3] Add apply methods to assert, assume, cover (by @adkian-sifive in #5048)
  Added Scala 3 assert, assume, cover apply methods for Scala 3
• [Scala3] Add BundleSpec and enable Scala3 CI testing (by @adkian-sifive in #5050)
  Enable CI testing in Scala 3 starting with BundleSpec

Full Changelog: v7.1.1...v7.2.0

Chisel v7.1.1

Fixes

• Rename private[chisel3] SourceInfo$Intf to SourceInfoIntf (by @jackkoenig in #5033)
  This works around an issue in IntelliJ around using the macro to materialize SourceInfo.

Documentation

• Update README for Chisel 7.1.0 (by @jackkoenig in #5032)

Build and Internal Changes

• [main] Enable MiMa for v7.1.0 (by @chiselbot in #5031)

Full Changelog: v7.1.0...v7.1.1

Chisel v7.1.0

Features

• [core] Add Temporal inline layer, trait (by @seldridge in #5018)
• [core] Add LayerControl.Disable (by @seldridge in #5019)
• [chiselsim] Drop Temporal layers for Verilator Cli (by @seldridge in #5024)

Fixes

• Fix construction of PseudoModules to have correct parent (by @jackkoenig in #5012)
  This fixes subtle bugs where accessing children of an Instance (whether directly or by using Select APIs) could change the result of future Select to be incorrect. For example, a call to Select.unsafe.allCurrentInstancesIn could cause Select.unsafe.currentInstancesIn to also incorrectly include grandchildren and all other transitive children.
• [svsim] Update c++ CFLAGS for verilator from c++14 to c++17 (by @Gallagator in #5017)
  Verilator CFLAGS bumped from c++14 to c++17
• Overload Stage methods to use Seq[Annotation] (by @jackkoenig in #5030)
  Also deprecate the older forms using AnnotationSeq.

Documentation

• [docs] Update layer docs for temporal layer, NFC (by @seldridge in #5020)
• [docs] Fix duplicate versions in Firrtl Version table (by @jackkoenig in #5025)
  Also refactor some build util code to be Tasks so they can be cached on disk.
• [doc] Document temporal layers and ChiselSim (by @seldridge in #5027)

Dependency Updates

• [cd] Bump CIRCT from firtool-1.128.0 to firtool-1.129.0 (by @chiselbot in #5010)
• [cd] Bump CIRCT from firtool-1.129.0 to firtool-1.130.0 (by @chiselbot in #5015)
• [cd] Bump CIRCT from firtool-1.130.0 to firtool-1.131.0 (by @chiselbot in #5021)

Build and Internal Changes

• Restore binary compatibility checking (by @jackkoenig in #5028)

Full Changelog: v7.0.0...v7.1.0