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GUI AdvChipset

Dimitris Panokostas edited this page Mar 16, 2026 · 1 revision

Advanced Chipset Panel

PanelAdvChipset

Provides fine-grained control over individual chipset hardware components, chip revisions, and low-level compatibility settings. Most users should leave these at their defaults unless emulating a specific machine configuration.

Compatible Settings

Compatible Settings (checkbox)

  • When enabled, forces all chipset settings to safe defaults that maximize compatibility with the selected machine model
  • Most controls on this panel are disabled while this is active
  • Equivalent to selecting a machine preset in the Chipset Extra dropdown on the Chipset panel

Battery Backed Up Real Time Clock

RTC type

Selects the real-time clock chip to emulate:

  • None — No RTC present
  • MSM6242B — Ricoh/OKI MSM6242B RTC chip, used in the A2000
  • RF5C01A — Ricoh RF5C01A (RP5C01A) RTC chip, used in the A3000 and A4000
  • A2000 MSM6242B — MSM6242B with A2000-specific behavior

Adj

  • Adjusts the RTC time by the specified number of seconds
  • Useful for correcting clock drift in emulated hardware

CIA-A TOD Clock Source

Selects the signal source for the CIA-A Time of Day (TOD) counter:

  • Vertical Sync — TOD clock driven by the vertical blank interrupt (default)
  • Power Supply 50Hz — TOD clock from a 50 Hz power line frequency signal
  • Power Supply 60Hz — TOD clock from a 60 Hz power line frequency signal

Chipset Features

Individual chipset hardware features that can be enabled or disabled:

  • CIA ROM Overlay — Enables the CIA-based Kickstart ROM overlay mechanism used during boot
  • A1000 Boot RAM/ROM — Enables A1000-style boot RAM at address $C00000
  • DF0: ID Hardware — Enables hardware drive ID detection for DF0
  • CD32 CD — Enables the CD32 CD-ROM drive hardware
  • CD32 C2P — Enables CD32 chunky-to-planar hardware acceleration
  • CD32 NVRAM — Enables CD32 non-volatile RAM for saving game data
  • CDTV CD — Enables the CDTV CD-ROM drive hardware
  • CDTV SRAM — Enables CDTV static RAM for saving data
  • CDTV-CR — Enables the CDTV card reader
  • A600/A1200 IDE — Enables the Gayle IDE controller used in A600 and A1200
  • A4000/A4000T IDE — Enables the IDE controller used in A4000 and A4000T
  • PCMCIA — Enables the PCMCIA slot present in A600 and A1200
  • ROM Mirror (E0) — Enables a Kickstart ROM mirror at address $E00000
  • ROM Mirror (A8) — Enables a Kickstart ROM mirror at address $A80000
  • Composite color burst — Enables the color burst signal on composite video output
  • KB Reset Warning — Shows a warning when the keyboard reset combination is pressed
  • Z3 Autoconfig — Enables Zorro III AutoConfig for expansion boards
  • CIA 391078-01 — Uses the newer CIA chip revision 391078-01 for both CIA-A and CIA-B
  • CIA TOD bug — Emulates the CIA Time of Day hardware bug present in early chip revisions
  • Custom register byte write bug — Emulates the byte write bug in custom chip registers
  • Power up memory pattern — Fills memory with a pattern on power-up, matching real hardware behavior
  • 1M Chip / 0.5M+0.5M — Enables the jumper for 1 MB chip RAM or 512 KB + 512 KB configuration (disabled when chip RAM is 1 MB or larger)
  • KS ROM has Chip RAM speed — Kickstart ROM runs at Chip RAM speed instead of the faster ROM speed
  • Toshiba Gary — Uses the Toshiba variant of the Gary chip instead of the Commodore variant

Unmapped address space

  • Controls what value is returned when reading from unmapped memory addresses:
    • Floating — Returns floating bus values (most accurate)
    • Zero — Returns zero
    • FF — Returns $FF

CIA E-Clock Sync

  • Selects the CIA E-Clock synchronization method:
    • Autoselect — Automatically selects the appropriate method
    • 68000 — Standard 68000 E-Clock synchronization
    • Gayle — Gayle chip E-Clock synchronization (A600/A1200)
    • 68000 Alternate — Alternate 68000 synchronization mode

Internal SCSI Hardware

A3000 WD33C93 SCSI

  • Enables the A3000 built-in WD33C93 SCSI controller

A4000T NCR53C710 SCSI

  • Enables the A4000T built-in NCR53C710 SCSI controller

Chipset Revision

Allows specifying exact chip revision numbers for individual custom chips. Each chip has an enable checkbox; when enabled, a hex input field sets the revision number.

Ramsey revision

  • Enables the Ramsey memory controller with a specific revision number (hexadecimal)
  • Used in A3000 and A4000

Fat Gary revision

  • Enables the Fat Gary chip with a specific revision number (hexadecimal)
  • Used in A3000 and A4000

Agnus/Alice model

  • Enables Agnus (OCS/ECS) or Alice (AGA) with a specific revision number (hexadecimal)
  • Model — Selects the Agnus/Alice variant: Auto, Velvet, or A1000
  • Size — Selects the addressable memory size: Auto, 512k, 1M, or 2M

Denise/Lisa model

  • Enables Denise (OCS/ECS) or Lisa (AGA) with a specific revision number (hexadecimal)
  • Model — Selects the Denise/Lisa variant: Auto, Velvet, A1000 No-EHB, or A1000

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